diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
index 40ed4684ec..0eaeb82f82 100644
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/RealView.py
@@ -1075,10 +1075,13 @@ Interrupts:
 
         self.smmu = SMMUv3(reg_map=AddrRange(0x2b400000, size=0x00020000))
 
+        self.smmu.master = bus.slave
+        self.smmu.control = bus.master
+
         dma_ports = []
         for dev in devices:
             self._attach_device(dev, bus, dma_ports)
-            self.smmu.connect(dev, bus)
+            self.smmu.connect(dev)
 
     def setupBootLoader(self, cur_sys, boot_loader):
         super(VExpress_GEM5_Base, self).setupBootLoader(
diff --git a/src/dev/arm/SMMUv3.py b/src/dev/arm/SMMUv3.py
index 9d50540b2c..5be09de6f1 100644
--- a/src/dev/arm/SMMUv3.py
+++ b/src/dev/arm/SMMUv3.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2013, 2018-2019 ARM Limited
+# Copyright (c) 2013, 2018-2020 ARM Limited
 # All rights reserved
 #
 # The license below extends only to copyright in the software and shall
@@ -182,7 +182,7 @@ class SMMUv3(ClockedObject):
         node.appendPhandle(self)
         yield node
 
-    def connect(self, device, bus):
+    def connect(self, device):
         """
         Helper method used to connect the SMMU. The master could
         be either a dma port (if the SMMU is attached directly to a
@@ -190,9 +190,6 @@ class SMMUv3(ClockedObject):
         is attached to a bridge).
         """
 
-        self.master = bus.slave
-        self.control = bus.master
-
         slave_interface = SMMUv3SlaveInterface()
 
         if hasattr(device, "master"):