tests: Adding tests to evaluate memory modules.

This change adds a script to validate the statistics reported
by gem5. It also overrides has_dma_ports for TestBoard to allow
other cache hierarchies such as MESITwoLevel connect to this board.

Change-Id: Iae0e61c1763c099cf10924a08b3e4989dc31e220
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50752
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>

src/python/gem5/components/boards/test_board.py

@@ -128,3 +128,7 @@ class TestBoard(AbstractBoard):
         # memory.
         self.mem_ranges = [AddrRange(memory.get_size())]
         memory.set_memory_range(self.mem_ranges)
+
+    @overrides(AbstractBoard)
+    def has_dma_ports(self) -> bool:
+        return False