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Hand-merge static_inst.hh. These execute functions are within an external file in the new CPU case.

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cpu/static_inst.hh:
    Hand-merge.  These execute functions are within an external file in the new CPU case.

--HG--
extra : convert_revision : a34112f471fa31bdd5bb53552ddd704b9571c110
This commit is contained in:
Kevin Lim
2005-03-08 21:03:20 -05:00
parent bb41c21d6a 550e6a5010
commit 2162b433ad
17 changed files with 392 additions and 306 deletions
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1
cpu/full_cpu/op_class.hh
View File

@@ -51,6 +51,7 @@ enum OpClass {
FloatSqrtOp, /* floating point square root */
MemReadOp, /* memory read port */
MemWriteOp, /* memory write port */
IprAccessOp, /* Internal Processor Register read/write port */
InstPrefetchOp, /* instruction prefetch port (on I-cache) */
Num_OpClasses /* total functional unit classes */
};

16
cpu/simple_cpu/simple_cpu.hh
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@@ -259,47 +259,47 @@ class SimpleCPU : public BaseCPU
// storage (which is pretty hard to imagine they would have reason
// to do).
uint64_t readIntReg(StaticInst<TheISA> *si, int idx)
uint64_t readIntReg(const StaticInst<TheISA> *si, int idx)
{
return xc->readIntReg(si->srcRegIdx(idx));
}
float readFloatRegSingle(StaticInst<TheISA> *si, int idx)
float readFloatRegSingle(const StaticInst<TheISA> *si, int idx)
{
int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
return xc->readFloatRegSingle(reg_idx);
}
double readFloatRegDouble(StaticInst<TheISA> *si, int idx)
double readFloatRegDouble(const StaticInst<TheISA> *si, int idx)
{
int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
return xc->readFloatRegDouble(reg_idx);
}
uint64_t readFloatRegInt(StaticInst<TheISA> *si, int idx)
uint64_t readFloatRegInt(const StaticInst<TheISA> *si, int idx)
{
int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
return xc->readFloatRegInt(reg_idx);
}
void setIntReg(StaticInst<TheISA> *si, int idx, uint64_t val)
void setIntReg(const StaticInst<TheISA> *si, int idx, uint64_t val)
{
xc->setIntReg(si->destRegIdx(idx), val);
}
void setFloatRegSingle(StaticInst<TheISA> *si, int idx, float val)
void setFloatRegSingle(const StaticInst<TheISA> *si, int idx, float val)
{
int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
xc->setFloatRegSingle(reg_idx, val);
}
void setFloatRegDouble(StaticInst<TheISA> *si, int idx, double val)
void setFloatRegDouble(const StaticInst<TheISA> *si, int idx, double val)
{
int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
xc->setFloatRegDouble(reg_idx, val);
}
void setFloatRegInt(StaticInst<TheISA> *si, int idx, uint64_t val)
void setFloatRegInt(const StaticInst<TheISA> *si, int idx, uint64_t val)
{
int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
xc->setFloatRegInt(reg_idx, val);

2
cpu/static_inst.cc
View File

@@ -68,7 +68,7 @@ StaticInst<AlphaISA>::nullStaticInstPtr;
template <class ISA>
bool
StaticInst<ISA>::hasBranchTarget(Addr pc, ExecContext *xc, Addr &tgt)
StaticInst<ISA>::hasBranchTarget(Addr pc, ExecContext *xc, Addr &tgt) const
{
if (isDirectCtrl()) {
tgt = branchTarget(pc);

10
cpu/static_inst.hh
View File

@@ -294,13 +294,13 @@ class StaticInst : public StaticInstBase
* String representation of disassembly (lazily evaluated via
* disassemble()).
*/
std::string *cachedDisassembly;
mutable std::string *cachedDisassembly;
/**
* Internal function to generate disassembly string.
*/
virtual std::string generateDisassembly(Addr pc,
const SymbolTable *symtab) = 0;
virtual std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const = 0;
/// Constructor.
StaticInst(const char *_mnemonic, MachInst _machInst, OpClass __opClass)
@@ -347,7 +347,7 @@ class StaticInst : public StaticInstBase
* Return true if the instruction is a control transfer, and if so,
* return the target address as well.
*/
bool hasBranchTarget(Addr pc, ExecContext *xc, Addr &tgt);
bool hasBranchTarget(Addr pc, ExecContext *xc, Addr &tgt) const;
/**
* Return string representation of disassembled instruction.
@@ -357,7 +357,7 @@ class StaticInst : public StaticInstBase
* should not be cached, this function should be overridden directly.
*/
virtual const std::string &disassemble(Addr pc,
const SymbolTable *symtab = 0)
const SymbolTable *symtab = 0) const
{
if (!cachedDisassembly)
cachedDisassembly =