derek/gem5
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

inorder-alpha-port: initial inorder support of ALPHA

Browse Source 
Edit AlphaISA to support the inorder model. Mostly alternate constructor functions and also a few skeleton multithreaded support functions
* * *
Remove namespace from header file. Causes compiler issues that are hard to find
* * *
Separate the TLB from the CPU and allow it to live in the TLBUnit resource. Give CPU accessor functions for access and also bind at construction time
* * *
Expose memory access size and flags through instruction object
(temporarily memAccSize and memFlags to get TLB stuff working.)
This commit is contained in:
Korey Sewell
2009-05-12 15:01:13 -04:00
parent 63db33c4b1
commit 1c8dfd9254
16 changed files with 232 additions and 26 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/cpu/inorder/resources/mult_div_unit.cc
View File

@@ -47,7 +47,7 @@ MultDivUnit::MultDivUnit(string res_name, int res_id, int res_width,
div16RepeatRate(params->div16RepeatRate), div16Latency(params->div16Latency),
div24RepeatRate(params->div24RepeatRate), div24Latency(params->div24Latency),
div32RepeatRate(params->div32RepeatRate), div32Latency(params->div32Latency),
lastMDUCycle(0)
lastMDUCycle(0), lastOpType(No_OpClass)
{ }
void