From 1a1ba692c33a7be5cee9664a5d5e27cfcdffc2b4 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Mon, 13 Sep 2021 18:22:38 -0700 Subject: [PATCH] sim: Move the MemPools object out of System and into SEWorkload. This removes the need for all the FullSystem checks in the System class, and simplifies that class in general. Change-Id: Ie8a3bc67db9195027d2111009b15ca59221bdeb2 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50348 Reviewed-by: Giacomo Travaglini Maintainer: Giacomo Travaglini Tested-by: kokoro --- src/arch/arm/freebsd/se_workload.hh | 3 +- src/arch/arm/linux/se_workload.hh | 3 +- src/arch/arm/se_workload.hh | 4 ++- src/arch/mips/linux/se_workload.hh | 3 +- src/arch/mips/se_workload.hh | 4 ++- src/arch/power/linux/se_workload.hh | 3 +- src/arch/power/se_workload.hh | 4 ++- src/arch/riscv/linux/se_workload.hh | 3 +- src/arch/riscv/se_workload.hh | 4 ++- src/arch/sparc/linux/se_workload.cc | 3 +- src/arch/x86/linux/se_workload.cc | 2 +- src/sim/mem_pool.cc | 16 ++++------- src/sim/se_workload.cc | 16 ++++++++--- src/sim/se_workload.hh | 9 +++++- src/sim/system.cc | 28 ++---------------- src/sim/system.hh | 13 +-------- util/cpt_upgraders/mempool-to-seworkload.py | 32 +++++++++++++++++++++ 17 files changed, 85 insertions(+), 65 deletions(-) create mode 100644 util/cpt_upgraders/mempool-to-seworkload.py diff --git a/src/arch/arm/freebsd/se_workload.hh b/src/arch/arm/freebsd/se_workload.hh index 0d04284b69..a7f34532d2 100644 --- a/src/arch/arm/freebsd/se_workload.hh +++ b/src/arch/arm/freebsd/se_workload.hh @@ -35,6 +35,7 @@ #define __ARCH_ARM_FREEBSD_SE_WORKLOAD_HH__ #include "arch/arm/freebsd/freebsd.hh" +#include "arch/arm/page_size.hh" #include "arch/arm/regs/cc.hh" #include "arch/arm/regs/int.hh" #include "arch/arm/se_workload.hh" @@ -52,7 +53,7 @@ class EmuFreebsd : public SEWorkload public: using Params = ArmEmuFreebsdParams; - EmuFreebsd(const Params &p) : SEWorkload(p) {} + EmuFreebsd(const Params &p) : SEWorkload(p, PageShift) {} struct BaseSyscallABI {}; struct SyscallABI32 : public SEWorkload::SyscallABI32, diff --git a/src/arch/arm/linux/se_workload.hh b/src/arch/arm/linux/se_workload.hh index f7f469ce73..0ff08c7d74 100644 --- a/src/arch/arm/linux/se_workload.hh +++ b/src/arch/arm/linux/se_workload.hh @@ -29,6 +29,7 @@ #define __ARCH_ARM_LINUX_SE_WORKLOAD_HH__ #include "arch/arm/linux/linux.hh" +#include "arch/arm/page_size.hh" #include "arch/arm/regs/int.hh" #include "arch/arm/se_workload.hh" #include "params/ArmEmuLinux.hh" @@ -45,7 +46,7 @@ class EmuLinux : public SEWorkload public: using Params = ArmEmuLinuxParams; - EmuLinux(const Params &p) : SEWorkload(p) {} + EmuLinux(const Params &p) : SEWorkload(p, PageShift) {} struct BaseSyscallABI {}; struct SyscallABI32 : public SEWorkload::SyscallABI32, diff --git a/src/arch/arm/se_workload.hh b/src/arch/arm/se_workload.hh index 6d1d8edf21..deb5d3b906 100644 --- a/src/arch/arm/se_workload.hh +++ b/src/arch/arm/se_workload.hh @@ -44,7 +44,9 @@ class SEWorkload : public gem5::SEWorkload public: using Params = ArmSEWorkloadParams; - SEWorkload(const Params &p) : gem5::SEWorkload(p) {} + SEWorkload(const Params &p, Addr page_shift) : + gem5::SEWorkload(p, page_shift) + {} void setSystem(System *sys) override diff --git a/src/arch/mips/linux/se_workload.hh b/src/arch/mips/linux/se_workload.hh index 04100d2af9..c94112c335 100644 --- a/src/arch/mips/linux/se_workload.hh +++ b/src/arch/mips/linux/se_workload.hh @@ -30,6 +30,7 @@ #define __ARCH_MIPS_LINUX_SE_WORKLOAD_HH__ #include "arch/mips/linux/linux.hh" +#include "arch/mips/page_size.hh" #include "arch/mips/se_workload.hh" #include "params/MipsEmuLinux.hh" #include "sim/syscall_desc.hh" @@ -49,7 +50,7 @@ class EmuLinux : public SEWorkload public: using Params = MipsEmuLinuxParams; - EmuLinux(const Params &p) : SEWorkload(p) {} + EmuLinux(const Params &p) : SEWorkload(p, PageShift) {} void syscall(ThreadContext *tc) override; }; diff --git a/src/arch/mips/se_workload.hh b/src/arch/mips/se_workload.hh index 52b620e9d1..178093d837 100644 --- a/src/arch/mips/se_workload.hh +++ b/src/arch/mips/se_workload.hh @@ -46,7 +46,9 @@ class SEWorkload : public gem5::SEWorkload public: using Params = MipsSEWorkloadParams; - SEWorkload(const Params &p) : gem5::SEWorkload(p) {} + SEWorkload(const Params &p, Addr page_shift) : + gem5::SEWorkload(p, page_shift) + {} void setSystem(System *sys) override diff --git a/src/arch/power/linux/se_workload.hh b/src/arch/power/linux/se_workload.hh index 93d9c1ee80..1b380adc7e 100644 --- a/src/arch/power/linux/se_workload.hh +++ b/src/arch/power/linux/se_workload.hh @@ -31,6 +31,7 @@ #define __ARCH_POWER_LINUX_SE_WORKLOAD_HH__ #include "arch/power/linux/linux.hh" +#include "arch/power/page_size.hh" #include "arch/power/se_workload.hh" #include "params/PowerEmuLinux.hh" #include "sim/syscall_desc.hh" @@ -50,7 +51,7 @@ class EmuLinux : public SEWorkload public: using Params = PowerEmuLinuxParams; - EmuLinux(const Params &p) : SEWorkload(p) {} + EmuLinux(const Params &p) : SEWorkload(p, PageShift) {} void syscall(ThreadContext *tc) override; }; diff --git a/src/arch/power/se_workload.hh b/src/arch/power/se_workload.hh index 1c9e485079..2b6279529d 100644 --- a/src/arch/power/se_workload.hh +++ b/src/arch/power/se_workload.hh @@ -46,7 +46,9 @@ class SEWorkload : public gem5::SEWorkload { public: using Params = PowerSEWorkloadParams; - SEWorkload(const Params &p) : gem5::SEWorkload(p) {} + SEWorkload(const Params &p, Addr page_shift) : + gem5::SEWorkload(p, page_shift) + {} void setSystem(System *sys) override diff --git a/src/arch/riscv/linux/se_workload.hh b/src/arch/riscv/linux/se_workload.hh index 6d722ef286..bdc39ceb14 100644 --- a/src/arch/riscv/linux/se_workload.hh +++ b/src/arch/riscv/linux/se_workload.hh @@ -31,6 +31,7 @@ #define __ARCH_RISCV_LINUX_SE_WORKLOAD_HH__ #include "arch/riscv/linux/linux.hh" +#include "arch/riscv/page_size.hh" #include "arch/riscv/se_workload.hh" #include "params/RiscvEmuLinux.hh" #include "sim/syscall_desc.hh" @@ -54,7 +55,7 @@ class EmuLinux : public SEWorkload public: using Params = RiscvEmuLinuxParams; - EmuLinux(const Params &p) : SEWorkload(p) {} + EmuLinux(const Params &p) : SEWorkload(p, PageShift) {} void syscall(ThreadContext *tc) override; }; diff --git a/src/arch/riscv/se_workload.hh b/src/arch/riscv/se_workload.hh index 5152c58aa7..1f8a0677b8 100644 --- a/src/arch/riscv/se_workload.hh +++ b/src/arch/riscv/se_workload.hh @@ -46,7 +46,9 @@ class SEWorkload : public gem5::SEWorkload public: using Params = RiscvSEWorkloadParams; - SEWorkload(const Params &p) : gem5::SEWorkload(p) {} + SEWorkload(const Params &p, Addr page_shift) : + gem5::SEWorkload(p, page_shift) + {} void setSystem(System *sys) override diff --git a/src/arch/sparc/linux/se_workload.cc b/src/arch/sparc/linux/se_workload.cc index 64386f4773..c502b532cc 100644 --- a/src/arch/sparc/linux/se_workload.cc +++ b/src/arch/sparc/linux/se_workload.cc @@ -30,6 +30,7 @@ #include +#include "arch/sparc/page_size.hh" #include "arch/sparc/process.hh" #include "base/loader/object_file.hh" #include "base/trace.hh" @@ -76,7 +77,7 @@ LinuxLoader linuxLoader; namespace SparcISA { -EmuLinux::EmuLinux(const Params &p) : SEWorkload(p) +EmuLinux::EmuLinux(const Params &p) : SEWorkload(p, PageShift) {} void diff --git a/src/arch/x86/linux/se_workload.cc b/src/arch/x86/linux/se_workload.cc index 43e712dd1a..46a6327d77 100644 --- a/src/arch/x86/linux/se_workload.cc +++ b/src/arch/x86/linux/se_workload.cc @@ -93,7 +93,7 @@ LinuxLoader linuxLoader; namespace X86ISA { -EmuLinux::EmuLinux(const Params &p) : SEWorkload(p) +EmuLinux::EmuLinux(const Params &p) : SEWorkload(p, PageShift) {} const std::vector EmuLinux::SyscallABI64::ArgumentRegs = { diff --git a/src/sim/mem_pool.cc b/src/sim/mem_pool.cc index 21efb5c7c0..a0d7f53c4b 100644 --- a/src/sim/mem_pool.cc +++ b/src/sim/mem_pool.cc @@ -152,17 +152,11 @@ MemPools::populate(const System &sys) AddrRangeList memories = sys.getPhysMem().getConfAddrRanges(); const auto &m5op_range = sys.m5opRange(); - assert(!memories.empty()); - for (const auto &mem : memories) { - assert(!mem.interleaved()); - if (m5op_range.valid()) { - // Make sure the m5op range is not included. - for (const auto &range: mem.exclude({m5op_range})) - pools.emplace_back(pageShift, range.start(), range.end()); - } else { - pools.emplace_back(pageShift, mem.start(), mem.end()); - } - } + if (m5op_range.valid()) + memories -= m5op_range; + + for (const auto &mem : memories) + pools.emplace_back(pageShift, mem.start(), mem.end()); /* * Set freePage to what it was before Gabe Black's page table changes diff --git a/src/sim/se_workload.cc b/src/sim/se_workload.cc index c2b48d1169..47bdb1cc09 100644 --- a/src/sim/se_workload.cc +++ b/src/sim/se_workload.cc @@ -35,9 +35,17 @@ namespace gem5 { -SEWorkload::SEWorkload(const Params &p) : Workload(p) +SEWorkload::SEWorkload(const Params &p, Addr page_shift) : + Workload(p), memPools(page_shift) {} +void +SEWorkload::setSystem(System *sys) +{ + Workload::setSystem(sys); + memPools.populate(*sys); +} + void SEWorkload::syscall(ThreadContext *tc) { @@ -47,19 +55,19 @@ SEWorkload::syscall(ThreadContext *tc) Addr SEWorkload::allocPhysPages(int npages, int pool_id) { - return system->allocPhysPages(npages, pool_id); + return memPools.allocPhysPages(npages, pool_id); } Addr SEWorkload::memSize(int pool_id) const { - return system->memSize(pool_id); + return memPools.memSize(pool_id); } Addr SEWorkload::freeMemSize(int pool_id) const { - return system->freeMemSize(pool_id); + return memPools.freeMemSize(pool_id); } } // namespace gem5 diff --git a/src/sim/se_workload.hh b/src/sim/se_workload.hh index 8fc443c01e..5bc597f067 100644 --- a/src/sim/se_workload.hh +++ b/src/sim/se_workload.hh @@ -29,6 +29,7 @@ #define __SIM_SE_WORKLOAD_HH__ #include "params/SEWorkload.hh" +#include "sim/mem_pool.hh" #include "sim/workload.hh" namespace gem5 @@ -36,10 +37,16 @@ namespace gem5 class SEWorkload : public Workload { + protected: + /** Memory allocation objects for all physical memories in the system. */ + MemPools memPools; + public: using Params = SEWorkloadParams; - SEWorkload(const Params &p); + SEWorkload(const Params &p, Addr page_shift=0); + + void setSystem(System *sys) override; Addr getEntry() const override diff --git a/src/sim/system.cc b/src/sim/system.cc index 8777fc4c31..14e6a78f4a 100644 --- a/src/sim/system.cc +++ b/src/sim/system.cc @@ -67,7 +67,6 @@ #include "params/System.hh" #include "sim/byteswap.hh" #include "sim/debug.hh" -#include "sim/full_system.hh" #include "sim/redirect_path.hh" #include "sim/serialize_handlers.hh" @@ -199,7 +198,6 @@ int System::numSystemsRunning = 0; System::System(const Params &p) : SimObject(p), _systemPort("system_port", this), multiThread(p.multi_thread), - memPools(getPageShift()), init_param(p.init_param), physProxy(_systemPort, p.cache_line_size), workload(p.workload), @@ -222,9 +220,6 @@ System::System(const Params &p) if (workload) workload->setSystem(this); - if (!FullSystem) - memPools.populate(*this); - // add self to global system list systemList.push_back(this); @@ -343,24 +338,9 @@ System::validKvmEnvironment() const } Addr -System::allocPhysPages(int npages, int pool_id) +System::memSize() const { - assert(!FullSystem); - return memPools.allocPhysPages(npages, pool_id); -} - -Addr -System::memSize(int pool_id) const -{ - assert(!FullSystem); - return memPools.memSize(pool_id); -} - -Addr -System::freeMemSize(int pool_id) const -{ - assert(!FullSystem); - return memPools.freeMemSize(pool_id); + return physmem.totalSize(); } bool @@ -414,8 +394,6 @@ System::serialize(CheckpointOut &cp) const paramOut(cp, csprintf("quiesceEndTick_%d", id), when); } - memPools.serializeSection(cp, "memPools"); - // also serialize the memories in the system physmem.serializeSection(cp, "physmem"); } @@ -436,8 +414,6 @@ System::unserialize(CheckpointIn &cp) # endif } - memPools.unserializeSection(cp, "memPools"); - // also unserialize the memories in the system physmem.unserializeSection(cp, "physmem"); } diff --git a/src/sim/system.hh b/src/sim/system.hh index a5b7dd9a59..cf67a9578f 100644 --- a/src/sim/system.hh +++ b/src/sim/system.hh @@ -61,7 +61,6 @@ #include "mem/port_proxy.hh" #include "params/System.hh" #include "sim/futex_map.hh" -#include "sim/mem_pool.hh" #include "sim/redirect_path.hh" #include "sim/se_signal.hh" #include "sim/sim_object.hh" @@ -322,9 +321,6 @@ class System : public SimObject, public PCEventScope bool schedule(PCEvent *event) override; bool remove(PCEvent *event) override; - /** Memory allocation objects for all physical memories in the system. */ - MemPools memPools; - uint64_t init_param; /** Port to physical memory used for writing object files into ram at @@ -348,11 +344,8 @@ class System : public SimObject, public PCEventScope memory::PhysicalMemory& getPhysMem() { return physmem; } const memory::PhysicalMemory& getPhysMem() const { return physmem; } - /** Amount of physical memory that is still free */ - Addr freeMemSize(int poolID = 0) const; - /** Amount of physical memory that exists */ - Addr memSize(int poolID = 0) const; + Addr memSize() const; /** * Check if a physical address is within a range of a memory that @@ -593,10 +586,6 @@ class System : public SimObject, public PCEventScope public: - /// Allocate npages contiguous unused physical pages - /// @return Starting address of first page - Addr allocPhysPages(int npages, int poolID = 0); - void registerThreadContext( ThreadContext *tc, ContextID assigned=InvalidContextID); void replaceThreadContext(ThreadContext *tc, ContextID context_id); diff --git a/util/cpt_upgraders/mempool-to-seworkload.py b/util/cpt_upgraders/mempool-to-seworkload.py new file mode 100644 index 0000000000..c4ff50854a --- /dev/null +++ b/util/cpt_upgraders/mempool-to-seworkload.py @@ -0,0 +1,32 @@ +# This upgrader moves memory pools from the system object to the SE workload +# object. +def upgrader(cpt): + systems = {} + + # Find sections with 'num_mem_pools' options, and assume those are system + # objects which host MemPools. + for sec in cpt.sections(): + num_mem_pools = cpt.get(sec, 'num_mem_pools', fallback=None) + if num_mem_pools is not None: + systems[sec] = num_mem_pools + + for sec, num_mem_pools in systems.items(): + # Transfer num_mem_pools to the new location. + cpt.remove_option(sec, 'num_mem_pools') + cpt.set(f'{sec}.workload', 'num_mem_pools', num_mem_pools) + + for idx in range(int(num_mem_pools)): + old_name = f'{sec}.memPool{idx}' + new_name = f'{sec}.workload.memPool{idx}' + + # Create the new section. + cpt.add_section(new_name) + + # Copy items from the old section into it. + for item in cpt.items(old_name): + cpt.set(new_name, *item) + + # Delete the old section. + cpt.remove_section(old_name) + +depends = 'mempool-sections'