derek/gem5
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

ruby: memory controllers now inherit from an abstract "MemoryControl" class

Browse Source
This commit is contained in:
Nuwan Jayasena
2012-07-10 22:51:53 -07:00
parent 4a52a6ea2d
commit 1740c4c448
8 changed files with 976 additions and 752 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/mem/ruby/system/SConscript
View File

@@ -39,6 +39,7 @@ SimObject('DirectoryMemory.py')
SimObject('MemoryControl.py')
SimObject('WireBuffer.py')
SimObject('RubySystem.py')
SimObject('RubyMemoryControl.py')
Source('DMASequencer.cc')
Source('DirectoryMemory.cc')
@@ -46,6 +47,7 @@ Source('SparseMemory.cc')
Source('CacheMemory.cc')
Source('MemoryControl.cc')
Source('WireBuffer.cc')
Source('RubyMemoryControl.cc')
Source('MemoryNode.cc')
Source('PersistentTable.cc')
Source('RubyPort.cc')