tests: Delete some test files which are specific to Alpha.
Change-Id: Idbffab70abdbb59817c6e002e26b8cb0fa96a4e2 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25458 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu> Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
This commit is contained in:
Gabe Black
@@ -1,99 +0,0 @@
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# Copyright (c) 2012 ARM Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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||||||
# property including but not limited to intellectual property relating
|
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||||||
# to a hardware implementation of the functionality of the software
|
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||||||
# licensed hereunder. You may use the software subject to the license
|
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||||||
# terms below provided that you ensure that this notice is replicated
|
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||||||
# unmodified and in its entirety in all distributions of the software,
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||||||
# modified or unmodified, in source code or in binary form.
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#
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# Redistribution and use in source and binary forms, with or without
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||||||
# modification, are permitted provided that the following conditions are
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||||||
# met: redistributions of source code must retain the above copyright
|
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||||||
# notice, this list of conditions and the following disclaimer;
|
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||||||
# redistributions in binary form must reproduce the above copyright
|
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||||||
# notice, this list of conditions and the following disclaimer in the
|
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||||||
# documentation and/or other materials provided with the distribution;
|
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||||||
# neither the name of the copyright holders nor the names of its
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||||||
# contributors may be used to endorse or promote products derived from
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||||||
# this software without specific prior written permission.
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||||||
#
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||||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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||||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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||||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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from abc import ABCMeta, abstractmethod
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import m5
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from m5.objects import *
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from m5.proxy import *
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m5.util.addToPath('../configs/')
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from common import FSConfig, SysPaths
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from common.Caches import *
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from base_config import *
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class LinuxAlphaSystemBuilder(object):
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"""Mix-in that implements create_system.
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This mix-in is intended as a convenient way of adding an
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Alpha-specific create_system method to a class deriving from one of
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the generic base systems.
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"""
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def __init__(self):
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"""
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Arguments:
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machine_type -- String describing the platform to simulate
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"""
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pass
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def create_system(self):
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system = FSConfig.makeLinuxAlphaSystem(self.mem_mode)
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system.kernel = SysPaths.binary('vmlinux')
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self.init_system(system)
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return system
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class LinuxAlphaFSSystem(LinuxAlphaSystemBuilder,
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BaseFSSystem):
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"""Basic Alpha full system builder."""
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def __init__(self, **kwargs):
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"""Initialize an Alpha system that supports full system simulation.
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Note: Keyword arguments that are not listed below will be
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passed to the BaseFSSystem.
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Keyword Arguments:
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-
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"""
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BaseSystem.__init__(self, **kwargs)
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LinuxAlphaSystemBuilder.__init__(self)
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class LinuxAlphaFSSystemUniprocessor(LinuxAlphaSystemBuilder,
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BaseFSSystemUniprocessor):
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"""Basic Alpha full system builder for uniprocessor systems.
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Note: This class is a specialization of the AlphaFSSystem and is
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only really needed to provide backwards compatibility for existing
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test cases.
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"""
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def __init__(self, **kwargs):
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BaseFSSystemUniprocessor.__init__(self, **kwargs)
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LinuxAlphaSystemBuilder.__init__(self)
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class LinuxAlphaFSSwitcheroo(LinuxAlphaSystemBuilder, BaseFSSwitcheroo):
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"""Uniprocessor Alpha system prepared for CPU switching"""
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def __init__(self, **kwargs):
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BaseFSSwitcheroo.__init__(self, **kwargs)
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LinuxAlphaSystemBuilder.__init__(self)
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@@ -1,42 +0,0 @@
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# Copyright (c) 2012 ARM Limited
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# All rights reserved.
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||||||
#
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||||||
# The license below extends only to copyright in the software and shall
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||||||
# not be construed as granting a license to any other intellectual
|
|
||||||
# property including but not limited to intellectual property relating
|
|
||||||
# to a hardware implementation of the functionality of the software
|
|
||||||
# licensed hereunder. You may use the software subject to the license
|
|
||||||
# terms below provided that you ensure that this notice is replicated
|
|
||||||
# unmodified and in its entirety in all distributions of the software,
|
|
||||||
# modified or unmodified, in source code or in binary form.
|
|
||||||
#
|
|
||||||
# Redistribution and use in source and binary forms, with or without
|
|
||||||
# modification, are permitted provided that the following conditions are
|
|
||||||
# met: redistributions of source code must retain the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer;
|
|
||||||
# redistributions in binary form must reproduce the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer in the
|
|
||||||
# documentation and/or other materials provided with the distribution;
|
|
||||||
# neither the name of the copyright holders nor the names of its
|
|
||||||
# contributors may be used to endorse or promote products derived from
|
|
||||||
# this software without specific prior written permission.
|
|
||||||
#
|
|
||||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
||||||
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
||||||
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
||||||
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
||||||
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
||||||
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
||||||
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
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from m5.objects import *
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from alpha_generic import *
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root = LinuxAlphaFSSystem(mem_mode='timing',
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mem_class=DDR3_1600_8x8,
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cpu_class=MinorCPU,
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num_cpus=2).create_root()
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@@ -1,41 +0,0 @@
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# Copyright (c) 2012 ARM Limited
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||||||
# All rights reserved.
|
|
||||||
#
|
|
||||||
# The license below extends only to copyright in the software and shall
|
|
||||||
# not be construed as granting a license to any other intellectual
|
|
||||||
# property including but not limited to intellectual property relating
|
|
||||||
# to a hardware implementation of the functionality of the software
|
|
||||||
# licensed hereunder. You may use the software subject to the license
|
|
||||||
# terms below provided that you ensure that this notice is replicated
|
|
||||||
# unmodified and in its entirety in all distributions of the software,
|
|
||||||
# modified or unmodified, in source code or in binary form.
|
|
||||||
#
|
|
||||||
# Redistribution and use in source and binary forms, with or without
|
|
||||||
# modification, are permitted provided that the following conditions are
|
|
||||||
# met: redistributions of source code must retain the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer;
|
|
||||||
# redistributions in binary form must reproduce the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer in the
|
|
||||||
# documentation and/or other materials provided with the distribution;
|
|
||||||
# neither the name of the copyright holders nor the names of its
|
|
||||||
# contributors may be used to endorse or promote products derived from
|
|
||||||
# this software without specific prior written permission.
|
|
||||||
#
|
|
||||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
||||||
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
||||||
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
||||||
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
||||||
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
||||||
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
||||||
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
|
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||||||
from m5.objects import *
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from alpha_generic import *
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root = LinuxAlphaFSSystemUniprocessor(mem_mode='timing',
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mem_class=DDR3_1600_8x8,
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cpu_class=MinorCPU).create_root()
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@@ -1,42 +0,0 @@
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# Copyright (c) 2012 ARM Limited
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||||||
# All rights reserved.
|
|
||||||
#
|
|
||||||
# The license below extends only to copyright in the software and shall
|
|
||||||
# not be construed as granting a license to any other intellectual
|
|
||||||
# property including but not limited to intellectual property relating
|
|
||||||
# to a hardware implementation of the functionality of the software
|
|
||||||
# licensed hereunder. You may use the software subject to the license
|
|
||||||
# terms below provided that you ensure that this notice is replicated
|
|
||||||
# unmodified and in its entirety in all distributions of the software,
|
|
||||||
# modified or unmodified, in source code or in binary form.
|
|
||||||
#
|
|
||||||
# Redistribution and use in source and binary forms, with or without
|
|
||||||
# modification, are permitted provided that the following conditions are
|
|
||||||
# met: redistributions of source code must retain the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer;
|
|
||||||
# redistributions in binary form must reproduce the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer in the
|
|
||||||
# documentation and/or other materials provided with the distribution;
|
|
||||||
# neither the name of the copyright holders nor the names of its
|
|
||||||
# contributors may be used to endorse or promote products derived from
|
|
||||||
# this software without specific prior written permission.
|
|
||||||
#
|
|
||||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
||||||
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
||||||
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
||||||
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
||||||
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
||||||
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
||||||
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
|
|
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from m5.objects import *
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from alpha_generic import *
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root = LinuxAlphaFSSystem(mem_mode='timing',
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mem_class=DDR3_1600_8x8,
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cpu_class=DerivO3CPU,
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num_cpus=2).create_root()
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@@ -1,41 +0,0 @@
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# Copyright (c) 2012 ARM Limited
|
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||||||
# All rights reserved.
|
|
||||||
#
|
|
||||||
# The license below extends only to copyright in the software and shall
|
|
||||||
# not be construed as granting a license to any other intellectual
|
|
||||||
# property including but not limited to intellectual property relating
|
|
||||||
# to a hardware implementation of the functionality of the software
|
|
||||||
# licensed hereunder. You may use the software subject to the license
|
|
||||||
# terms below provided that you ensure that this notice is replicated
|
|
||||||
# unmodified and in its entirety in all distributions of the software,
|
|
||||||
# modified or unmodified, in source code or in binary form.
|
|
||||||
#
|
|
||||||
# Redistribution and use in source and binary forms, with or without
|
|
||||||
# modification, are permitted provided that the following conditions are
|
|
||||||
# met: redistributions of source code must retain the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer;
|
|
||||||
# redistributions in binary form must reproduce the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer in the
|
|
||||||
# documentation and/or other materials provided with the distribution;
|
|
||||||
# neither the name of the copyright holders nor the names of its
|
|
||||||
# contributors may be used to endorse or promote products derived from
|
|
||||||
# this software without specific prior written permission.
|
|
||||||
#
|
|
||||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
||||||
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
||||||
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
||||||
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
||||||
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
||||||
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
||||||
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
|
|
||||||
from m5.objects import *
|
|
||||||
from alpha_generic import *
|
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|
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root = LinuxAlphaFSSystemUniprocessor(mem_mode='timing',
|
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mem_class=DDR3_1600_8x8,
|
|
||||||
cpu_class=DerivO3CPU).create_root()
|
|
||||||
@@ -1,42 +0,0 @@
|
|||||||
# Copyright (c) 2012 ARM Limited
|
|
||||||
# All rights reserved.
|
|
||||||
#
|
|
||||||
# The license below extends only to copyright in the software and shall
|
|
||||||
# not be construed as granting a license to any other intellectual
|
|
||||||
# property including but not limited to intellectual property relating
|
|
||||||
# to a hardware implementation of the functionality of the software
|
|
||||||
# licensed hereunder. You may use the software subject to the license
|
|
||||||
# terms below provided that you ensure that this notice is replicated
|
|
||||||
# unmodified and in its entirety in all distributions of the software,
|
|
||||||
# modified or unmodified, in source code or in binary form.
|
|
||||||
#
|
|
||||||
# Redistribution and use in source and binary forms, with or without
|
|
||||||
# modification, are permitted provided that the following conditions are
|
|
||||||
# met: redistributions of source code must retain the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer;
|
|
||||||
# redistributions in binary form must reproduce the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer in the
|
|
||||||
# documentation and/or other materials provided with the distribution;
|
|
||||||
# neither the name of the copyright holders nor the names of its
|
|
||||||
# contributors may be used to endorse or promote products derived from
|
|
||||||
# this software without specific prior written permission.
|
|
||||||
#
|
|
||||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
||||||
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
||||||
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
||||||
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
||||||
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
||||||
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
||||||
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
|
|
||||||
from m5.objects import *
|
|
||||||
from alpha_generic import *
|
|
||||||
|
|
||||||
root = LinuxAlphaFSSystem(mem_mode='atomic',
|
|
||||||
mem_class=SimpleMemory,
|
|
||||||
cpu_class=AtomicSimpleCPU,
|
|
||||||
num_cpus=2).create_root()
|
|
||||||
@@ -1,41 +0,0 @@
|
|||||||
# Copyright (c) 2012 ARM Limited
|
|
||||||
# All rights reserved.
|
|
||||||
#
|
|
||||||
# The license below extends only to copyright in the software and shall
|
|
||||||
# not be construed as granting a license to any other intellectual
|
|
||||||
# property including but not limited to intellectual property relating
|
|
||||||
# to a hardware implementation of the functionality of the software
|
|
||||||
# licensed hereunder. You may use the software subject to the license
|
|
||||||
# terms below provided that you ensure that this notice is replicated
|
|
||||||
# unmodified and in its entirety in all distributions of the software,
|
|
||||||
# modified or unmodified, in source code or in binary form.
|
|
||||||
#
|
|
||||||
# Redistribution and use in source and binary forms, with or without
|
|
||||||
# modification, are permitted provided that the following conditions are
|
|
||||||
# met: redistributions of source code must retain the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer;
|
|
||||||
# redistributions in binary form must reproduce the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer in the
|
|
||||||
# documentation and/or other materials provided with the distribution;
|
|
||||||
# neither the name of the copyright holders nor the names of its
|
|
||||||
# contributors may be used to endorse or promote products derived from
|
|
||||||
# this software without specific prior written permission.
|
|
||||||
#
|
|
||||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
||||||
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
||||||
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
||||||
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
||||||
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
||||||
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
||||||
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
|
|
||||||
from m5.objects import *
|
|
||||||
from alpha_generic import *
|
|
||||||
|
|
||||||
root = LinuxAlphaFSSystemUniprocessor(mem_mode='atomic',
|
|
||||||
mem_class=SimpleMemory,
|
|
||||||
cpu_class=AtomicSimpleCPU).create_root()
|
|
||||||
@@ -1,42 +0,0 @@
|
|||||||
# Copyright (c) 2012 ARM Limited
|
|
||||||
# All rights reserved.
|
|
||||||
#
|
|
||||||
# The license below extends only to copyright in the software and shall
|
|
||||||
# not be construed as granting a license to any other intellectual
|
|
||||||
# property including but not limited to intellectual property relating
|
|
||||||
# to a hardware implementation of the functionality of the software
|
|
||||||
# licensed hereunder. You may use the software subject to the license
|
|
||||||
# terms below provided that you ensure that this notice is replicated
|
|
||||||
# unmodified and in its entirety in all distributions of the software,
|
|
||||||
# modified or unmodified, in source code or in binary form.
|
|
||||||
#
|
|
||||||
# Redistribution and use in source and binary forms, with or without
|
|
||||||
# modification, are permitted provided that the following conditions are
|
|
||||||
# met: redistributions of source code must retain the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer;
|
|
||||||
# redistributions in binary form must reproduce the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer in the
|
|
||||||
# documentation and/or other materials provided with the distribution;
|
|
||||||
# neither the name of the copyright holders nor the names of its
|
|
||||||
# contributors may be used to endorse or promote products derived from
|
|
||||||
# this software without specific prior written permission.
|
|
||||||
#
|
|
||||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
||||||
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
||||||
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
||||||
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
||||||
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
||||||
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
||||||
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
|
|
||||||
from m5.objects import *
|
|
||||||
from alpha_generic import *
|
|
||||||
|
|
||||||
root = LinuxAlphaFSSystem(mem_mode='timing',
|
|
||||||
mem_class=DDR3_1600_8x8,
|
|
||||||
cpu_class=TimingSimpleCPU,
|
|
||||||
num_cpus=2).create_root()
|
|
||||||
@@ -1,41 +0,0 @@
|
|||||||
# Copyright (c) 2012 ARM Limited
|
|
||||||
# All rights reserved.
|
|
||||||
#
|
|
||||||
# The license below extends only to copyright in the software and shall
|
|
||||||
# not be construed as granting a license to any other intellectual
|
|
||||||
# property including but not limited to intellectual property relating
|
|
||||||
# to a hardware implementation of the functionality of the software
|
|
||||||
# licensed hereunder. You may use the software subject to the license
|
|
||||||
# terms below provided that you ensure that this notice is replicated
|
|
||||||
# unmodified and in its entirety in all distributions of the software,
|
|
||||||
# modified or unmodified, in source code or in binary form.
|
|
||||||
#
|
|
||||||
# Redistribution and use in source and binary forms, with or without
|
|
||||||
# modification, are permitted provided that the following conditions are
|
|
||||||
# met: redistributions of source code must retain the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer;
|
|
||||||
# redistributions in binary form must reproduce the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer in the
|
|
||||||
# documentation and/or other materials provided with the distribution;
|
|
||||||
# neither the name of the copyright holders nor the names of its
|
|
||||||
# contributors may be used to endorse or promote products derived from
|
|
||||||
# this software without specific prior written permission.
|
|
||||||
#
|
|
||||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
||||||
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
||||||
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
||||||
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
||||||
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
||||||
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
||||||
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
|
|
||||||
from m5.objects import *
|
|
||||||
from alpha_generic import *
|
|
||||||
|
|
||||||
root = LinuxAlphaFSSystemUniprocessor(mem_mode='timing',
|
|
||||||
mem_class=DDR3_1600_8x8,
|
|
||||||
cpu_class=TimingSimpleCPU).create_root()
|
|
||||||
@@ -1,47 +0,0 @@
|
|||||||
# Copyright (c) 2012 ARM Limited
|
|
||||||
# All rights reserved.
|
|
||||||
#
|
|
||||||
# The license below extends only to copyright in the software and shall
|
|
||||||
# not be construed as granting a license to any other intellectual
|
|
||||||
# property including but not limited to intellectual property relating
|
|
||||||
# to a hardware implementation of the functionality of the software
|
|
||||||
# licensed hereunder. You may use the software subject to the license
|
|
||||||
# terms below provided that you ensure that this notice is replicated
|
|
||||||
# unmodified and in its entirety in all distributions of the software,
|
|
||||||
# modified or unmodified, in source code or in binary form.
|
|
||||||
#
|
|
||||||
# Redistribution and use in source and binary forms, with or without
|
|
||||||
# modification, are permitted provided that the following conditions are
|
|
||||||
# met: redistributions of source code must retain the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer;
|
|
||||||
# redistributions in binary form must reproduce the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer in the
|
|
||||||
# documentation and/or other materials provided with the distribution;
|
|
||||||
# neither the name of the copyright holders nor the names of its
|
|
||||||
# contributors may be used to endorse or promote products derived from
|
|
||||||
# this software without specific prior written permission.
|
|
||||||
#
|
|
||||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
||||||
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
||||||
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
||||||
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
||||||
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
||||||
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
||||||
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
|
|
||||||
from m5.objects import *
|
|
||||||
from alpha_generic import *
|
|
||||||
import switcheroo
|
|
||||||
|
|
||||||
root = LinuxAlphaFSSwitcheroo(
|
|
||||||
mem_class=DDR3_1600_8x8,
|
|
||||||
cpu_classes=(AtomicSimpleCPU, TimingSimpleCPU, DerivO3CPU)
|
|
||||||
).create_root()
|
|
||||||
|
|
||||||
# Setup a custom test method that uses the switcheroo tester that
|
|
||||||
# switches between CPU models.
|
|
||||||
run_test = switcheroo.run_test
|
|
||||||
@@ -1,103 +0,0 @@
|
|||||||
# Copyright (c) 2006 The Regents of The University of Michigan
|
|
||||||
# All rights reserved.
|
|
||||||
#
|
|
||||||
# Redistribution and use in source and binary forms, with or without
|
|
||||||
# modification, are permitted provided that the following conditions are
|
|
||||||
# met: redistributions of source code must retain the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer;
|
|
||||||
# redistributions in binary form must reproduce the above copyright
|
|
||||||
# notice, this list of conditions and the following disclaimer in the
|
|
||||||
# documentation and/or other materials provided with the distribution;
|
|
||||||
# neither the name of the copyright holders nor the names of its
|
|
||||||
# contributors may be used to endorse or promote products derived from
|
|
||||||
# this software without specific prior written permission.
|
|
||||||
#
|
|
||||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
||||||
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
||||||
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
||||||
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
||||||
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
||||||
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
||||||
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
||||||
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
|
|
||||||
import m5
|
|
||||||
from m5.objects import *
|
|
||||||
m5.util.addToPath('../configs/')
|
|
||||||
from common import Benchmarks, FSConfig, SysPaths
|
|
||||||
|
|
||||||
test_sys = FSConfig.makeLinuxAlphaSystem('atomic',
|
|
||||||
Benchmarks.SysConfig('netperf-stream-client.rcS'))
|
|
||||||
test_sys.kernel = SysPaths.binary('vmlinux')
|
|
||||||
|
|
||||||
# Dummy voltage domain for all test_sys clock domains
|
|
||||||
test_sys.voltage_domain = VoltageDomain()
|
|
||||||
|
|
||||||
# Create the system clock domain
|
|
||||||
test_sys.clk_domain = SrcClockDomain(clock = '1GHz',
|
|
||||||
voltage_domain = test_sys.voltage_domain)
|
|
||||||
|
|
||||||
test_sys.cpu = AtomicSimpleCPU(cpu_id=0)
|
|
||||||
# create the interrupt controller
|
|
||||||
test_sys.cpu.createInterruptController()
|
|
||||||
test_sys.cpu.connectAllPorts(test_sys.membus)
|
|
||||||
|
|
||||||
# Create a seperate clock domain for components that should run at
|
|
||||||
# CPUs frequency
|
|
||||||
test_sys.cpu.clk_domain = SrcClockDomain(clock = '2GHz',
|
|
||||||
voltage_domain =
|
|
||||||
test_sys.voltage_domain)
|
|
||||||
|
|
||||||
# Create a separate clock domain for Ethernet
|
|
||||||
test_sys.tsunami.ethernet.clk_domain = SrcClockDomain(clock = '500MHz',
|
|
||||||
voltage_domain =
|
|
||||||
test_sys.voltage_domain)
|
|
||||||
|
|
||||||
# In contrast to the other (one-system) Tsunami configurations we do
|
|
||||||
# not have an IO cache but instead rely on an IO bridge for accesses
|
|
||||||
# from masters on the IO bus to the memory bus
|
|
||||||
test_sys.iobridge = Bridge(delay='50ns', ranges = test_sys.mem_ranges)
|
|
||||||
test_sys.iobridge.slave = test_sys.iobus.master
|
|
||||||
test_sys.iobridge.master = test_sys.membus.slave
|
|
||||||
|
|
||||||
test_sys.physmem = SimpleMemory(range = test_sys.mem_ranges[0])
|
|
||||||
test_sys.physmem.port = test_sys.membus.master
|
|
||||||
|
|
||||||
drive_sys = FSConfig.makeLinuxAlphaSystem('atomic',
|
|
||||||
Benchmarks.SysConfig('netperf-server.rcS'))
|
|
||||||
drive_sys.kernel = SysPaths.binary('vmlinux')
|
|
||||||
# Dummy voltage domain for all drive_sys clock domains
|
|
||||||
drive_sys.voltage_domain = VoltageDomain()
|
|
||||||
# Create the system clock domain
|
|
||||||
drive_sys.clk_domain = SrcClockDomain(clock = '1GHz',
|
|
||||||
voltage_domain =
|
|
||||||
drive_sys.voltage_domain)
|
|
||||||
drive_sys.cpu = AtomicSimpleCPU(cpu_id=0)
|
|
||||||
# create the interrupt controller
|
|
||||||
drive_sys.cpu.createInterruptController()
|
|
||||||
drive_sys.cpu.connectAllPorts(drive_sys.membus)
|
|
||||||
|
|
||||||
# Create a seperate clock domain for components that should run at
|
|
||||||
# CPUs frequency
|
|
||||||
drive_sys.cpu.clk_domain = SrcClockDomain(clock = '4GHz',
|
|
||||||
voltage_domain =
|
|
||||||
drive_sys.voltage_domain)
|
|
||||||
|
|
||||||
# Create a separate clock domain for Ethernet
|
|
||||||
drive_sys.tsunami.ethernet.clk_domain = SrcClockDomain(clock = '500MHz',
|
|
||||||
voltage_domain =
|
|
||||||
drive_sys.voltage_domain)
|
|
||||||
|
|
||||||
drive_sys.iobridge = Bridge(delay='50ns', ranges = drive_sys.mem_ranges)
|
|
||||||
drive_sys.iobridge.slave = drive_sys.iobus.master
|
|
||||||
drive_sys.iobridge.master = drive_sys.membus.slave
|
|
||||||
|
|
||||||
drive_sys.physmem = SimpleMemory(range = drive_sys.mem_ranges[0])
|
|
||||||
drive_sys.physmem.port = drive_sys.membus.master
|
|
||||||
|
|
||||||
root = FSConfig.makeDualRoot(True, test_sys, drive_sys, "ethertrace")
|
|
||||||
|
|
||||||
maxtick = 199999999
|
|
||||||
Binary file not shown.
Reference in New Issue
Block a user