From 159953080a747275dba79359f57e6b28c2c06e32 Mon Sep 17 00:00:00 2001 From: Gabriel Busnot Date: Wed, 5 Oct 2022 10:49:48 +0200 Subject: [PATCH] mem-ruby: Fix of an address bug in MESI_Two_Level-dir.sm Physical access address and line address were mixed up in qw_queueMemoryWBRequest_partial Change-Id: I0b238ffc59d2bb3de221d96905c75b7616eac964 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/67661 Tested-by: kokoro Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power --- src/mem/ruby/protocol/MESI_Two_Level-dir.sm | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mem/ruby/protocol/MESI_Two_Level-dir.sm b/src/mem/ruby/protocol/MESI_Two_Level-dir.sm index aa614248b1..84ec578788 100644 --- a/src/mem/ruby/protocol/MESI_Two_Level-dir.sm +++ b/src/mem/ruby/protocol/MESI_Two_Level-dir.sm @@ -365,7 +365,7 @@ machine(MachineType:Directory, "MESI Two Level directory protocol") desc="Queue off-chip writeback request") { peek(requestNetwork_in, RequestMsg) { enqueue(memQueue_out, MemoryMsg, to_mem_ctrl_latency) { - out_msg.addr := address; + out_msg.addr := in_msg.addr; out_msg.Type := MemoryRequestType:MEMORY_WB; out_msg.Sender := machineID; out_msg.MessageSize := MessageSizeType:Writeback_Data;