From 124f82c1098ef3546bd8cc99f741b74cf05a599a Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Mon, 22 Feb 2021 03:20:18 -0800 Subject: [PATCH] arch-x86: Move (most) non-public values out of registers.hh. The unnecessary DependenceTags is already being removed by another pending change, and so is left in place for that to remove. Once that's happened, the regs/*.hh includes can be removed, and there may be other include related tangles to sort out. Change-Id: I1c02aa8fd2f2045017609b70523b3519c2a92b03 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41742 Maintainer: Bobby R. Bruce Reviewed-by: Gabe Black Tested-by: kokoro --- src/arch/x86/insts/static_inst.cc | 4 ++-- src/arch/x86/isa.cc | 2 +- src/arch/x86/isa/specialize.isa | 4 ++-- src/arch/x86/linux/linux.hh | 2 +- src/arch/x86/process.cc | 2 +- src/arch/x86/registers.hh | 19 ++++--------------- src/arch/x86/regs/float.hh | 5 +++++ src/arch/x86/regs/int.hh | 4 ++++ src/arch/x86/utility.cc | 6 ++++-- 9 files changed, 24 insertions(+), 24 deletions(-) diff --git a/src/arch/x86/insts/static_inst.cc b/src/arch/x86/insts/static_inst.cc index c23d01417b..6a9286e545 100644 --- a/src/arch/x86/insts/static_inst.cc +++ b/src/arch/x86/insts/static_inst.cc @@ -240,13 +240,13 @@ X86StaticInst::printMem(std::ostream &os, uint8_t segment, os << "rip"; someAddr = true; } else { - if (scale != 0 && index != ZeroReg) { + if (scale != 0 && index != NUM_INTREGS) { if (scale != 1) ccprintf(os, "%d*", scale); printReg(os, InstRegIndex(index), addressSize); someAddr = true; } - if (base != ZeroReg) { + if (base != NUM_INTREGS) { if (someAddr) os << " + "; printReg(os, InstRegIndex(base), addressSize); diff --git a/src/arch/x86/isa.cc b/src/arch/x86/isa.cc index d5dca43d90..556d73f7bb 100644 --- a/src/arch/x86/isa.cc +++ b/src/arch/x86/isa.cc @@ -182,7 +182,7 @@ ISA::copyRegsFrom(ThreadContext *src) for (int i = 0; i < NumFloatRegs; ++i) tc->setFloatRegFlat(i, src->readFloatRegFlat(i)); //copy condition-code regs - for (int i = 0; i < NumCCRegs; ++i) + for (int i = 0; i < NUM_CCREGS; ++i) tc->setCCRegFlat(i, src->readCCRegFlat(i)); copyMiscRegs(src, tc); tc->pcState(src->pcState()); diff --git a/src/arch/x86/isa/specialize.isa b/src/arch/x86/isa/specialize.isa index 946732f260..d6321f66d3 100644 --- a/src/arch/x86/isa/specialize.isa +++ b/src/arch/x86/isa/specialize.isa @@ -250,12 +250,12 @@ let {{ if opType.tag == "X": env.addToDisassembly( '''printMem(out, env.seg, - 1, X86ISA::ZeroReg, X86ISA::INTREG_RSI, 0, + 1, X86ISA::NUM_INTREGS, X86ISA::INTREG_RSI, 0, env.addressSize, false);''') else: env.addToDisassembly( '''printMem(out, SEGMENT_REG_ES, - 1, X86ISA::ZeroReg, X86ISA::INTREG_RDI, 0, + 1, X86ISA::NUM_INTREGS, X86ISA::INTREG_RDI, 0, env.addressSize, false);''') Name += "_M" else: diff --git a/src/arch/x86/linux/linux.hh b/src/arch/x86/linux/linux.hh index 6c98db8b1b..28bab32fec 100644 --- a/src/arch/x86/linux/linux.hh +++ b/src/arch/x86/linux/linux.hh @@ -62,7 +62,7 @@ class X86Linux : public Linux } if (stack) - ctc->setIntReg(X86ISA::StackPointerReg, stack); + ctc->setIntReg(X86ISA::INTREG_RSP, stack); } class SyscallABI {}; diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc index b46d4a358e..164f17e8a8 100644 --- a/src/arch/x86/process.cc +++ b/src/arch/x86/process.cc @@ -981,7 +981,7 @@ X86Process::argsInit(int pageSize, ThreadContext *tc = system->threads[contextIds[0]]; // Set the stack pointer register - tc->setIntReg(StackPointerReg, stack_min); + tc->setIntReg(INTREG_RSP, stack_min); // There doesn't need to be any segment base added in since we're dealing // with the flat segmentation model. diff --git a/src/arch/x86/registers.hh b/src/arch/x86/registers.hh index 8f50d64c68..f52d4eab58 100644 --- a/src/arch/x86/registers.hh +++ b/src/arch/x86/registers.hh @@ -41,23 +41,14 @@ #include "arch/generic/vec_pred_reg.hh" #include "arch/generic/vec_reg.hh" -#include "arch/x86/regs/int.hh" #include "arch/x86/regs/ccr.hh" +#include "arch/x86/regs/float.hh" +#include "arch/x86/regs/int.hh" #include "arch/x86/regs/misc.hh" -#include "arch/x86/x86_traits.hh" namespace X86ISA { -const int NumIntArchRegs = NUM_INTREGS; -const int NumIntRegs = NumIntArchRegs + NumMicroIntRegs + NumImplicitIntRegs; -const int NumCCRegs = NUM_CCREGS; - -// Each 128 bit xmm register is broken into two effective 64 bit registers. -// Add 8 for the indices that are mapped over the fp stack -const int NumFloatRegs = - NumMMXRegs + 2 * NumXMMRegs + NumMicroFpRegs + 8; - // These enumerate all the registers for dependence tracking. enum DependenceTags { @@ -66,14 +57,12 @@ enum DependenceTags // we just start at (1 << 7) == 128. FP_Reg_Base = 128, CC_Reg_Base = FP_Reg_Base + NumFloatRegs, - Misc_Reg_Base = CC_Reg_Base + NumCCRegs, + Misc_Reg_Base = CC_Reg_Base + NUM_CCREGS, Max_Reg_Index = Misc_Reg_Base + NUM_MISCREGS }; -// semantically meaningful register indices -//There is no such register in X86 +// There is no such register in X86. const int ZeroReg = NUM_INTREGS; -const int StackPointerReg = INTREG_RSP; // Not applicable to x86 using VecElem = ::DummyVecElem; diff --git a/src/arch/x86/regs/float.hh b/src/arch/x86/regs/float.hh index 6cba603fb1..963c1115f8 100644 --- a/src/arch/x86/regs/float.hh +++ b/src/arch/x86/regs/float.hh @@ -148,6 +148,11 @@ namespace X86ISA { return FLOATREG_FPR((top + index + 8) % 8); } + + // Each 128 bit xmm register is broken into two effective 64 bit registers. + // Add 8 for the indices that are mapped over the fp stack + const int NumFloatRegs = + NumMMXRegs + 2 * NumXMMRegs + NumMicroFpRegs + 8; } #endif // __ARCH_X86_FLOATREGS_HH__ diff --git a/src/arch/x86/regs/int.hh b/src/arch/x86/regs/int.hh index aa26224ae3..87b3190ff2 100644 --- a/src/arch/x86/regs/int.hh +++ b/src/arch/x86/regs/int.hh @@ -169,6 +169,10 @@ namespace X86ISA index = (index - 4) | foldBit; return (IntRegIndex)index; } + + const int NumIntArchRegs = NUM_INTREGS; + const int NumIntRegs = + NumIntArchRegs + NumMicroIntRegs + NumImplicitIntRegs; } #endif // __ARCH_X86_INTREGS_HH__ diff --git a/src/arch/x86/utility.cc b/src/arch/x86/utility.cc index 5293d6b4b9..e3add56e01 100644 --- a/src/arch/x86/utility.cc +++ b/src/arch/x86/utility.cc @@ -40,11 +40,13 @@ #include "arch/x86/interrupts.hh" #include "arch/x86/mmu.hh" -#include "arch/x86/registers.hh" +#include "arch/x86/regs/ccr.hh" +#include "arch/x86/regs/float.hh" +#include "arch/x86/regs/int.hh" +#include "arch/x86/regs/misc.hh" #include "arch/x86/x86_traits.hh" #include "cpu/base.hh" #include "fputils/fp80.h" -#include "sim/full_system.hh" namespace X86ISA {