Registers: Eliminate the ISA defined floating point register file.

This commit is contained in:
Gabe Black
2009-07-08 23:02:20 -07:00
parent 25884a8773
commit 0cb180ea0d
30 changed files with 83 additions and 1082 deletions

View File

@@ -265,7 +265,7 @@ InOrderCPU::InOrderCPU(Params *params)
lastSquashCycle[tid] = 0;
intRegFile[tid].clear();
floatRegFile[tid].clear();
memset(floatRegs.i[tid], 0, sizeof(floatRegs.i[tid]));
isa[tid].clear();
isa[tid].expandForMultithreading(numThreads, numVirtProcs);
@@ -892,13 +892,13 @@ InOrderCPU::readIntReg(int reg_idx, ThreadID tid)
FloatReg
InOrderCPU::readFloatReg(int reg_idx, ThreadID tid)
{
return floatRegFile[tid].readReg(reg_idx);
return floatRegs.f[tid][reg_idx];
}
FloatRegBits
InOrderCPU::readFloatRegBits(int reg_idx, ThreadID tid)
{;
return floatRegFile[tid].readRegBits(reg_idx);
return floatRegs.i[tid][reg_idx];
}
void
@@ -911,14 +911,14 @@ InOrderCPU::setIntReg(int reg_idx, uint64_t val, ThreadID tid)
void
InOrderCPU::setFloatReg(int reg_idx, FloatReg val, ThreadID tid)
{
floatRegFile[tid].setReg(reg_idx, val);
floatRegs.f[tid][reg_idx] = val;
}
void
InOrderCPU::setFloatRegBits(int reg_idx, FloatRegBits val, ThreadID tid)
{
floatRegFile[tid].setRegBits(reg_idx, val);
floatRegs.i[tid][reg_idx] = val;
}
uint64_t

View File

@@ -259,7 +259,10 @@ class InOrderCPU : public BaseCPU
/** The Register File for the CPU */
TheISA::IntRegFile intRegFile[ThePipeline::MaxThreads];;
TheISA::FloatRegFile floatRegFile[ThePipeline::MaxThreads];;
union {
FloatReg f[ThePipeline::MaxThreads][TheISA::NumFloatRegs];
FloatRegBits i[ThePipeline::MaxThreads][TheISA::NumFloatRegs];
} floatRegs;
/** ISA state */
TheISA::ISA isa[ThePipeline::MaxThreads];