derek/gem5
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

configs: More fixes for the memory system updates

Browse Source
This commit is contained in:
Ali Saidi
2012-02-01 09:48:28 -08:00
parent ea8b347dc5
commit 0a26883296
2 changed files with 6 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/dev/arm/RealView.py
View File

@@ -351,10 +351,11 @@ class VExpress_ELT(RealView):
def attachOnChipIO(self, bus, bridge):
self.gic.pio = bus.port
self.a9scu.pio = bus.port
self.local_cpu_timer.pio = bus.port
# Bridge ranges based on excluding what is part of on-chip I/O
# (gic, a9scu)
bridge.ranges = [AddrRange(self.pci_cfg_base, self.a9scu.pio_addr - 1),
AddrRange(self.local_cpu_timer.pio_addr, Addr.max)]
AddrRange(self.l2x0_fake.pio_addr, Addr.max)]
# Attach I/O devices to specified bus object. Can't do this
# earlier, since the bus object itself is typically defined at the
@@ -363,7 +364,6 @@ class VExpress_ELT(RealView):
self.elba_uart.pio = bus.port
self.uart.pio = bus.port
self.realview_io.pio = bus.port
self.local_cpu_timer.pio = bus.port
self.v2m_timer0.pio = bus.port
self.v2m_timer1.pio = bus.port
self.elba_timer0.pio = bus.port