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cpu: Add generalized register accessors setReg and getReg.

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These will read registers of any type, as described by a RegId. These
currently have default implementations which just delegate to the
existing, register type specific accessors.

Change-Id: I980ca15b3acd9a5a796c977276201d64c69398b8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49107
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2021-08-06 02:39:36 -07:00
parent d0b7de0f87
commit 06d455ec4e
2 changed files with 135 additions and 0 deletions
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14
src/cpu/thread_context.hh
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@@ -193,6 +193,13 @@ class ThreadContext : public PCEventScope
//
// New accessors for new decoder.
//
virtual RegVal getReg(const RegId &reg) const;
virtual void getReg(const RegId &reg, void *val) const;
virtual void *getWritableReg(const RegId &reg);
virtual void setReg(const RegId &reg, RegVal val);
virtual void setReg(const RegId &reg, const void *val);
virtual RegVal readIntReg(RegIndex reg_idx) const = 0;
virtual RegVal readFloatReg(RegIndex reg_idx) const = 0;
@@ -272,6 +279,13 @@ class ThreadContext : public PCEventScope
* serialization code to access all registers.
*/
virtual RegVal getRegFlat(const RegId &reg) const;
virtual void getRegFlat(const RegId &reg, void *val) const;
virtual void *getWritableRegFlat(const RegId &reg);
virtual void setRegFlat(const RegId &reg, RegVal val);
virtual void setRegFlat(const RegId &reg, const void *val);
virtual RegVal readIntRegFlat(RegIndex idx) const = 0;
virtual void setIntRegFlat(RegIndex idx, RegVal val) = 0;