DMA: Add IOCache and fix bus bridge to optionally only send requests one
way so a cache can handle partial block requests for i/o devices. --HG-- extra : convert_revision : a68b5ae826731bc87ed93eb7ef326a2393053964
This commit is contained in:
@@ -266,8 +266,7 @@ class DmaDevice : public PioDevice
|
||||
|
||||
void dmaWrite(Addr addr, int size, Event *event, uint8_t *data)
|
||||
{
|
||||
dmaPort->dmaAction(MemCmd::WriteInvalidateReq,
|
||||
addr, size, event, data);
|
||||
dmaPort->dmaAction(MemCmd::WriteReq, addr, size, event, data);
|
||||
}
|
||||
|
||||
void dmaRead(Addr addr, int size, Event *event, uint8_t *data)
|
||||
|
||||
Reference in New Issue
Block a user