From 03f79f47d8a23384e233f8ce7d98a60285088308 Mon Sep 17 00:00:00 2001 From: Giacomo Travaglini Date: Wed, 22 Sep 2021 18:05:38 +0100 Subject: [PATCH] arch-arm: FEAT_SEL2 is not part of ID_AA64ISAR0_EL1 Change-Id: I81cb3e8f400eaf8abc1dea61f592239e52501ab1 Signed-off-by: Giacomo Travaglini Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51015 Tested-by: kokoro Reviewed-by: Andreas Sandberg Maintainer: Andreas Sandberg --- src/arch/arm/isa.cc | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc index cbff06d5df..c01d173734 100644 --- a/src/arch/arm/isa.cc +++ b/src/arch/arm/isa.cc @@ -416,9 +416,7 @@ ISA::initID64(const ArmISAParams &p) miscRegs[MISCREG_ID_AA64PFR0_EL1] = insertBits( miscRegs[MISCREG_ID_AA64PFR0_EL1], 39, 36, release->has(ArmExtension::FEAT_SEL2) ? 0x1 : 0x0); - miscRegs[MISCREG_ID_AA64ISAR0_EL1] = insertBits( - miscRegs[MISCREG_ID_AA64ISAR0_EL1], 39, 36, - release->has(ArmExtension::FEAT_SEL2) ? 0x1 : 0x0); + // Large ASID support miscRegs[MISCREG_ID_AA64MMFR0_EL1] = insertBits( miscRegs[MISCREG_ID_AA64MMFR0_EL1], 7, 4,