@ARTICLE{joukah_15, author={Jouppi, Norman P. and Kahng, Andrew B. and Muralimanohar, Naveen and Srinivas, Vaishnav}, journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems}, title={CACTI-IO: CACTI With OFF-Chip Power-Area-Timing Models}, year={2015}, volume={23}, number={7}, pages={1254-1267}, doi={10.1109/TVLSI.2014.2334635}} @inproceedings{joukah_12, author = {Jouppi, Norman P. and Kahng, Andrew B. and Muralimanohar, Naveen and Srinivas, Vaishnav}, title = {CACTI-IO: CACTI with off-chip power-area-timing models}, year = {2012}, isbn = {9781450315739}, publisher = {Association for Computing Machinery}, address = {New York, NY, USA}, url = {https://doi.org/10.1145/2429384.2429446}, doi = {10.1145/2429384.2429446}, booktitle = {Proceedings of the International Conference on Computer-Aided Design}, pages = {294–301}, numpages = {8}, keywords = {CACTI, DRAM, IO, memory interface, power and timing models}, location = {San Jose, California}, series = {ICCAD '12} } @misc{micron_ddr3_11_kopie_ipsj, title = {{Micron System Power Calculator}}, author = {{Micron}}, howpublished = {last access 2024-11-12}, url={https://www.micron.com/sales-support/design-tools/dram-power-calculator}, year={2014} } @misc{kargoo_14, title = {{{DRAMPower}}: {{Open-source DRAM}} Power \& Energy Estimation Tool}, author = {Chandrasekar, Karthik and Weis, Christian and Li, Yonghui and Akesson, Benny and Naji, Omar and Jung, Matthias and Wehn, Norbert and Goossens, Kees}, year = {Last Access 15.08.2019}, address = {http://www.drampower.info/}, owner = {Brugger}, timestamp = {2019-08-15} } @inproceedings{junmat_16b, title = {A {{New Bank Sensitive DRAMPower Model}} for {{Efficient Design Space Exploration}}}, booktitle = {International Workshop on Power and Timing Modeling, Optimization and Simulation ({{PATMOS}} 2016)}, author = {Jung, Matthias and Mathew, Deepak M. and Zulian, {\'E}der F. and Weis, Christian and Wehn, Norbert}, year = {2016}, owner = {MJ}, timestamp = {2017-06-15} } @inproceedings{matzul_17, author = {Mathew, Deepak M. and Zulian, \'{E}der F. and Kannoth, Subash and Jung, Matthias and Weis, Christian and Wehn, Norbert}, title = {A Bank-Wise DRAM Power Model for System Simulations}, year = {2017}, isbn = {9781450348409}, publisher = {Association for Computing Machinery}, address = {New York, NY, USA}, url = {https://doi.org/10.1145/3023973.3023978}, doi = {10.1145/3023973.3023978}, booktitle = {Proceedings of the 9th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools}, articleno = {5}, numpages = {7}, keywords = {DRAM, Power, Simulation}, location = {Stockholm, Sweden}, series = {RAPIDO '17} } @article{ghoyag_18, title = {What {{Your DRAM Power Models Are Not Telling You}}: {{Lessons}} from a {{Detailed Experimental Study}}}, shorttitle = {What {{Your DRAM Power Models Are Not Telling You}}}, author = {Ghose, Saugata and Yaglik{\c c}i, Abdullah Giray and Gupta, Raghav and Lee, Donghyuk and Kudrolli, Kais and Liu, William X. and Hassan, Hasan and Chang, Kevin K. and Chatterjee, Niladrish and Agrawal, Aditya and O'Connor, Mike and Mutlu, Onur}, year = {2018}, month = dec, journal = {Proc. ACM Meas. Anal. Comput. Syst.}, volume = {2}, number = {3}, pages = {38:1--38:41}, doi = {10.1145/3224419}, urldate = {2024-10-25}, file = {/Users/myzinsky/Zotero/storage/NYBYGMFT/Ghose et al. - 2018 - What Your DRAM Power Models Are Not Telling You Lessons from a Detailed Experimental Study.pdf} } @ARTICLE{holsta_19, author={Hollis, Timothy M. and Stave, Eric and Ovard, Dave and Greeff, Roy and Spirkl, Worfgang and Brox, Martin and Taylor, Jennifer and Butterfield, Justin}, journal={IEEE Solid-State Circuits Magazine}, title={Recent Evolution in the DRAM Interface: Mile-Markers Along Memory Lane}, year={2019}, volume={11}, number={2}, pages={14-30}, keywords={Random access memory;Bandwidth;DRAM chips;Graphics;Memory management;Semiconductor devices}, doi={10.1109/MSSC.2019.2910617}} @article{balkah_17, author = {Balasubramonian, Rajeev and Kahng, Andrew B. and Muralimanohar, Naveen and Shafiee, Ali and Srinivas, Vaishnav}, title = {CACTI 7: New Tools for Interconnect Exploration in Innovative Off-Chip Memories}, year = {2017}, issue_date = {June 2017}, publisher = {Association for Computing Machinery}, address = {New York, NY, USA}, volume = {14}, number = {2}, issn = {1544-3566}, url = {https://doi.org/10.1145/3085572}, doi = {10.1145/3085572}, journal = {ACM Trans. Archit. Code Optim.}, month = jun, articleno = {14}, numpages = {25}, keywords = {DRAM, Memory, NVM, interconnects, tools} } @ARTICLE{donxu_12, author={Dong, Xiangyu and Xu, Cong and Xie, Yuan and Jouppi, Norman P.}, journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems}, title={NVSim: A Circuit-Level Performance, Energy, and Area Model for Emerging Nonvolatile Memory}, year={2012}, volume={31}, number={7}, pages={994-1007}, doi={10.1109/TCAD.2012.2185930}} @book{dalpou_98, place={Cambridge}, title={Digital Systems Engineering}, publisher={Cambridge University Press}, author={Dally, William J. and Poulton, John W.}, year={1998} } @book{bak_90, title={Circuits, Interconnections, and Packaging for VLSI}, author={Bakoglu, H.B.}, isbn={9780201060089}, lccn={87022964}, series={Addison-Wesley VLSI systems series}, year={1990}, publisher={Addison-Wesley Publishing Company} } @article{10.1145/3296957.3173177, author = {Boroumand, Amirali and Ghose, Saugata and Kim, Youngsok and Ausavarungnirun, Rachata and Shiu, Eric and Thakur, Rahul and Kim, Daehyun and Kuusela, Aki and Knies, Allan and Ranganathan, Parthasarathy and Mutlu, Onur}, title = {Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks}, year = {2018}, issue_date = {February 2018}, publisher = {Association for Computing Machinery}, address = {New York, NY, USA}, volume = {53}, number = {2}, issn = {0362-1340}, url = {https://doi.org/10.1145/3296957.3173177}, doi = {10.1145/3296957.3173177}, journal = {SIGPLAN Not.}, month = mar, pages = {316–331}, numpages = {16}, keywords = {consumer workloads, data movement, energy efficiency, memory systems, processing-in-memory} } @inproceedings{borgho_18, author = {Boroumand, Amirali and Ghose, Saugata and Kim, Youngsok and Ausavarungnirun, Rachata and Shiu, Eric and Thakur, Rahul and Kim, Daehyun and Kuusela, Aki and Knies, Allan and Ranganathan, Parthasarathy and Mutlu, Onur}, title = {Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks}, year = {2018}, isbn = {9781450349116}, publisher = {Association for Computing Machinery}, address = {New York, NY, USA}, url = {https://doi.org/10.1145/3173162.3173177}, doi = {10.1145/3173162.3173177}, booktitle = {Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems}, pages = {316–331}, numpages = {16}, keywords = {consumer workloads, data movement, energy efficiency, memory systems, processing-in-memory}, location = {Williamsburg, VA, USA}, series = {ASPLOS '18} } @inproceedings{feldmann_23, location = {Alexandria {VA} {USA}}, title = {A Precise Measurement Platform for {LPDDR}4 Memories}, isbn = {9798400716447}, url = {https://dl.acm.org/doi/10.1145/3631882.3631899}, doi = {10.1145/3631882.3631899}, eventtitle = {{MEMSYS} '23: The International Symposium on Memory Systems}, pages = {1--8}, booktitle = {Proceedings of the International Symposium on Memory Systems}, publisher = {{ACM}}, author = {Feldmann, Johannes and Steiner, Lukas and Christ, Derek and Psota, Thomas and Jung, Matthias and Wehn, Norbert}, urldate = {2024-11-14}, date = {2023-10-02} } @inproceedings{vog_10, title = {Understanding the {{Energy Consumption}} of {{Dynamic Random Access Memories}}}, booktitle = {2010 43rd {{Annual IEEE}}/{{ACM International Symposium}} on {{Microarchitecture}}}, author = {Vogelsang, Thomas}, year = {2010}, month = dec, pages = {363--374}, issn = {2379-3155}, doi = {10.1109/MICRO.2010.42}, urldate = {2024-11-14}, keywords = {Arrays,Capacitance,DRAM,Driver circuits,Logic gates,power,Random access memory,Transistors}, file = {/Users/myzinsky/Zotero/storage/3LW3ARUS/Vogelsang - 2010 - Understanding the Energy Consumption of Dynamic Random Access Memories.pdf;/Users/myzinsky/Zotero/storage/HEEPHYEU/5695550.html} } @inproceedings{yankao_24, title = {Characterization and {{Design}} of {{3D-Stacked Memory}} for {{Image Signal Processing}} on {{AR}}/{{VR Devices}}}, booktitle = {{{MEMSYS}}}, author = {Yang, Lita and Kao, Changjung and Srikanth, Sriseshan and Morris, Daniel and Sumbul, H Ekin and Wu, Tony F and Beign{\'e}, Edith}, year = {2024}, address = {Washingron}, langid = {english}, file = {/Users/myzinsky/Zotero/storage/22TRQV4G/Yang et al. - Characterization and Design of 3D-Stacked Memory for Image Signal Processing on ARVR Devices.pdf} } @article{bou_24, title = {Fixing {{AI}}'s Energy Crisis}, author = {Bourzac, Katherine}, year = {2024}, month = oct, journal = {Nature}, publisher = {Nature Publishing Group}, doi = {10.1038/d41586-024-03408-z}, urldate = {2024-11-14}, abstract = {Hardware that consumes less power will reduce artificial intelligence's appetite for energy. But transparency about its carbon footprint is still needed.}, copyright = {2024 Springer Nature Limited}, langid = {english}, keywords = {Computer science,Engineering,Machine learning,Sustainability,Technology}, annotation = {Bandiera\_abtest: a\\ Cg\_type: Outlook\\ Subject\_term: Machine learning, Sustainability, Technology, Computer science, Engineering}, file = {/Users/myzinsky/Zotero/storage/2XJ6LXCA/d41586-024-03408-z.html} } @InProceedings{stejun_20, author="Steiner, Lukas and Jung, Matthias and Prado, Felipe S. and Bykov, Kirill and Wehn, Norbert", title="{DRAMSys4.0}: A Fast and Cycle-Accurate {SystemC/TLM}-Based {DRAM} Simulator", booktitle="Embedded Computer Systems: Architectures, Modeling, and Simulation", year="2020", publisher="Springer International Publishing", address="Cham", pages="110--126", isbn="978-3-030-60939-9" }