Update on Overleaf.
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@@ -514,7 +514,7 @@ Thus, the equations need to be adapted accordingly, i.e., for GDDR, $I_{DD3N}$ m
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\subsection{Refresh Power}\label{subsec:refresh}
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\subsection{Refresh Power}\label{subsec:refresh}
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Depending on the DRAM standard, various refresh modes are supported.
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Depending on the DRAM standard, various refresh modes are offered.
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They differ in the number of banks that are refreshed with a single command.
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They differ in the number of banks that are refreshed with a single command.
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All-bank refresh commands target all banks of the device at once.
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All-bank refresh commands target all banks of the device at once.
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As no data can be accessed in banks where a refresh is in progress, this mode can cause a large drop in bandwidth.
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As no data can be accessed in banks where a refresh is in progress, this mode can cause a large drop in bandwidth.
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@@ -524,7 +524,7 @@ Thus, when a burst refresh current is provided, the energy for a single refresh
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\begin{equation}
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\begin{equation}
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E_{REF} = V_{DD} \cdot \left(I_{DD5B} - I_{\circled{N}}\right) \cdot t_{RFC}
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E_{REF} = V_{DD} \cdot \left(I_{DD5B} - I_{\circled{N}}\right) \cdot t_{RFC}
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\end{equation}
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\end{equation}
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wher
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During refresh, the targeted banks are considered active because
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During refresh, the targeted banks are considered active because
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@@ -756,7 +756,7 @@ As an example, Figure~\ref{fig:terminations} shows the two equivalent circuit di
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to [R,a=$R_{TT}$] ++(0,1.5) node[tground](VDDQ2){};
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to [R,a=$R_{TT}$] ++(0,1.5) node[tground](VDDQ2){};
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\node[anchor=south] at (VDDQ1) {$V_{DDQ}$};
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\node[anchor=south] at (VDDQ1) {$V_{DDQ}$};
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\node[anchor=south] at (VDDQ2) {$V_{DDQ}$};
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\node[anchor=south] at (VDDQ2) {$V_{DDQ}$};
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\draw(x2) to [open] ++(1.5,0) coordinate(x3)
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\draw(x2) to [open] ++(1.75,0) coordinate(x3)
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to [R=$R_{ON}$] ++(0,-1.0) node[ground](x4){};
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to [R=$R_{ON}$] ++(0,-1.0) node[ground](x4){};
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\draw(x3)
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\draw(x3)
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to [short=$"0"$, name={s2}] ++(2,0)
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to [short=$"0"$, name={s2}] ++(2,0)
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