Update on Overleaf.

drampower-main.tex

@@ -228,19 +228,31 @@ This demand is particularly pronounced in \textit{Artificial Intelligence} (AI)
 However, these bandwidths come at the cost of high power consumption.
 Google recently demonstrated that for large machine learning models, more than 90\,\% of the system power is consumed by memory.
 In augmented reality devices for the Metaverse, memory can account for up to 80\,\% of power consumption.\todo{quellen}
-Therefore, an accurate estimation of the DRAM power consumption is crucial already in early development stages to dimension the power supply circuits and cooling appropriately.
+Therefore, an accurate estimation of DRAM power consumption is critical in the early stages of design in order to properly dimension the power supply circuits and cooling.
+In mobile devices, on the other hand, the overall power budget is constrained to only a few watts.
+Nevertheless, it is equally important to accurately estimate DRAM power consumption, for example to explore the power saving potential of new DRAM standards and their additional features to extend battery life.
+In the current state of the art, there are two widely used open-source simulation tools for estimating DRAM power consumption, namely \textit{DRAMPower}~\cite{kargoo_14} and \textit{CACTI-IO}~\cite{joukah_12,joukah_15}.
+DRAMPower focuses on the power consumption of the DRAM core, while CACTI-IO models the power consumption of the DRAM interface.
+Unfortunately, both tools have not been updated in recent years, so they only provide support for older DRAM standards.
+At the same time, current generation DRAM standards like DDR5, LPDDR5 and HBM3 operate at much higher frequencies than their predecessors, use novel interconnection techniques, and offer many new features, which requires special consideration for power modeling.
+To the best of our knowledge, there is no open-source DRAM power simulator that provides accurate models of both the DRAM core and interface, and supports current generation DRAM standards such as DDR5, LPDDR5 and HBM3.
+To close this gap, this paper presents DRAMPower 5, a completely revised version of the DRAMPower simulator, 
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+old calculations cannot be directly applied.
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+
 
-two well known tools: DRAMPower for core and CACTI-IO for interface: only older standards, lower data rates
-new standards offer lots of new features and much higher data rates, which require special consideration.
 %
-However, modeling the power consumption of DRAM is intricate due to the diverse range of DRAM standards tailored for different applications, each with unique interface architectures (such as DIMM, POP, TSV, \dots), and varied power characteristics, particularly concerning the interface. Moreover, these standards present a significantly expanded feature set compared to earlier ones, including new types of refresh operations or power-down mechanisms.
+%However, modeling the power consumption of DRAM is intricate due to the diverse range of DRAM standards tailored for different applications, each with unique interface architectures (such as DIMM, POP, TSV, \dots), and varied power characteristics, particularly concerning the interface. Moreover, these standards present a significantly expanded feature set compared to earlier ones, including new types of refresh operations or power-down mechanisms.
 
 
 
 
 
 
-To the best of our knowledge, there exists no simulation tool that accurately models interface power and supports latest standards including DDR5, LPDDR5 and HBM3. Thus this paper presents a new DRAMPower simulator, called DRAMPower 5, which includes a new simulation kernel for a very efficient simulation, as well as the latest DRAM JEDEC standards. 
+%To the best of our knowledge, there exists no simulation tool that accurately models interface power and supports latest standards including DDR5, LPDDR5 and HBM3. Thus this paper presents a new DRAMPower simulator, called DRAMPower 5, which includes a new simulation kernel for a very efficient simulation, as well as the latest DRAM JEDEC standards. 
 
 This paper makes the following new contributions:
 \begin{itemize}