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Update on Overleaf.

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Lukas Steiner
2024-11-14 13:29:26 +00:00
committed by node
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commit 9ec1f7db1b
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drampower-main.tex
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@@ -524,7 +524,7 @@ Thus, when a burst refresh current is provided, the energy for a single refresh
\begin{equation} \begin{equation}
E_{REF} = V_{DD} \cdot \left(I_{DD5B} - I_{\circled{N}}\right) \cdot t_{RFC} E_{REF} = V_{DD} \cdot \left(I_{DD5B} - I_{\circled{N}}\right) \cdot t_{RFC}
\end{equation} \end{equation}
where $N$ is the number of where $N$ is the number of refreshed banks.
During refresh, the targeted banks are considered active because During refresh, the targeted banks are considered active because

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drampower.bib
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@@ -197,3 +197,18 @@ series = {ASPLOS '18}
langid = {english}, langid = {english},
file = {Feldmann et al. - 2023 - A Precise Measurement Platform for LPDDR4 Memories.pdf:/home/derek/.local/share/zotero/storage/C7RSPK9K/Feldmann et al. - 2023 - A Precise Measurement Platform for LPDDR4 Memories.pdf:application/pdf}, file = {Feldmann et al. - 2023 - A Precise Measurement Platform for LPDDR4 Memories.pdf:/home/derek/.local/share/zotero/storage/C7RSPK9K/Feldmann et al. - 2023 - A Precise Measurement Platform for LPDDR4 Memories.pdf:application/pdf},
} }
@inproceedings{vog_10,
title = {Understanding the {{Energy Consumption}} of {{Dynamic Random Access Memories}}},
booktitle = {2010 43rd {{Annual IEEE}}/{{ACM International Symposium}} on {{Microarchitecture}}},
author = {Vogelsang, Thomas},
year = {2010},
month = dec,
pages = {363--374},
issn = {2379-3155},
doi = {10.1109/MICRO.2010.42},
urldate = {2024-11-14},
abstract = {Energy consumption has become a major constraint on the capabilities of computer systems. In large systems the energy consumed by Dynamic Random Access Memories (DRAM) is a significant part of the total energy consumption. It is possible to calculate the energy consumption of currently available DRAMs from their datasheets, but datasheets don't allow extrapolation to future DRAM technologies and don't show how other changes like increasing bandwidth requirements change DRAM energy consumption. This paper first presents a flexible DRAM power model which uses a description of DRAM architecture, technology and operation to calculate power usage and verifies it against datasheet values. Then the model is used together with assumptions about the DRAM roadmap to extrapolate DRAM energy consumption to future DRAM generations. Using this model we evaluate some of the proposed DRAM power reduction schemes.},
keywords = {Arrays,Capacitance,DRAM,Driver circuits,Logic gates,power,Random access memory,Transistors},
file = {/Users/myzinsky/Zotero/storage/3LW3ARUS/Vogelsang - 2010 - Understanding the Energy Consumption of Dynamic Random Access Memories.pdf;/Users/myzinsky/Zotero/storage/HEEPHYEU/5695550.html}
}