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Fix some typos

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Derek Christ
2022-05-30 21:29:29 +02:00
parent d951a3a0d0
commit 32dddebd11
3 changed files with 13 additions and 12 deletions
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inc/4.caches.tex
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@@ -81,10 +81,10 @@ However, every time new data is referenced that gets placed into the same set, t
This leads to an overall lower cache hit rate as the other two policies.
In a fully associative cache, a memory reference can be placed anywhere, consequently all cache lines have to be fetched and compared to the tag.
Although this policy has the highest potential cache hit rate, the high space consumption due to comparators and high power consumption due to the lookup process, makes it non-feasable for many systems.
Although this policy has the highest potential cache hit rate, the high space consumption due to comparators and high power consumption due to the lookup process, makes it non-feasible for many systems.
The hybrid approach of set-associative caches offers a trade-off between both policies.
The term \textit{associtativity} denotes the number of cache lines that are contained in a set.
The term \textit{associativity} denotes the number of cache lines that are contained in a set.
\subsection{Replacement Policies}
\label{sec:replacement_policies}
@@ -127,7 +127,7 @@ Also here, a write buffer can be used to place the actual write back requests in
\subsection{Virtual Addressing}
\label{sec:caches_virtual_addressing}
Operating systems use virtual addressing to isolate the memory spaces of user space programs from each other, giving each process an own virtal address space.
Operating systems use virtual addressing to isolate the memory spaces of user space programs from each other, giving each process an own virtual address space.
\textit{Virtual addresses} are composed of a \textit{virtual page number} and a \textit{page offset}.
The virtual page number is the actual part that is virtual, the page offset is the same for the virtual and the physical address.
@@ -148,7 +148,7 @@ To improve performance, a \revabbr{translation lookaside buffer}{TLB} is used th
However, as long as the physical address is not present, the data cache cannot lookup its entries as the index is not known yet.
So the cache has to wait on the TLB, or worse on multiple memory accesses.
To circuumvent this problem, the cache can be indexed by the virtual address what makes it possible to parallize both procedures.
To circumvent this problem, the cache can be indexed by the virtual address what makes it possible to parallelize both procedures.
Such a cache is called \textit{virtually indexed} and \textit{physically tagged} and is illustrated in figure \ref{fig:virtual_address_conversion}.
% Ist die Darstellung aus dem Buch richtig? Sollte der Cache Index wirklich über den Page Offset hinaus gehen?