f11adf51dc
Major change to simulation logic in dramSys: Commands in a transaction are now scheduled one at a time, instead of scheduling a whole transaction at once. Since single commands (e.g. Pre or Act) are not that long, refreshes are allowed to be delayed to allow a command to finsh. Consequently, the whole loop in the ControllerCore about trying to scheduleding a transaction and aborting it when it collides with a refresh could be ommitted. Lastly, Fifo_Strict has been added, which is a Fifo Scheduler that forces the read and write transactions, even between different banks to be executed in order. Fifo and FR_FCFS have been modified to fit into the new scheduling logic.
618 lines
27 KiB
Python
618 lines
27 KiB
Python
import sys
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import traceback
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import sqlite3
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import os
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import xml.etree.ElementTree as ET
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def getPathToConfigs():
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return os.path.dirname(os.path.abspath(__file__).replace("/scripts","/configs"))
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def getValueFromConfigXML(root, id):
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return root.findall(".//parameter[@id='{0}']".format(id))[0].attrib['value']
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def getIntValueFromConfigXML(root, id):
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return int(root.findall(".//parameter[@id='{0}']".format(id))[0].attrib['value'])
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def getMemconfig(connection):
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cursor = connection.cursor()
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cursor.execute("SELECT Memconfig FROM GeneralInfo")
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result = cursor.fetchone()
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memconfig = result[0]
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return ET.parse(memconfig)
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def getMemspec(connection):
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cursor = connection.cursor()
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cursor.execute("SELECT Memspec FROM GeneralInfo")
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result = cursor.fetchone()
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memspec = result[0]
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return ET.parse(memspec)
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def getClock(connection):
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cursor = connection.cursor()
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cursor.execute("SELECT clk, UnitOfTime FROM GeneralInfo")
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result = cursor.fetchone()
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return (result[0],result[1])
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class DramConfig(object):
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memoryType = ""
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bankwiseLogic = 0
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clk = 0
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unitOfTime = ""
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dataRate = 0
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nActivateWindow = numberOfBanks = 0
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clk = 0
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tRP = 0 #precharge-time (pre -> act same bank)
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tRAS = 0 #active-time (act -> pre same bank)
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tRC = 0 #RAS-cycle-time (min time bw 2 succesive ACT to same bank)
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tCCD_S = 0 #TODO: relevant? max(bl, tCCD)
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tCCD_L = 0
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tRTP = 0 #Read to precharge
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tRRD_S = 0 #min time bw 2 succesive ACT to different banks (different bank group)
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tRRD_L = 0 #.. (same bank group)
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tRCD = 0 #act -> read/write
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tNAW = 0 #n activate window
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tRL = 0 #read latency (read command start to data strobe)
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tWL = 0 #write latency
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tWR = 0 #write recovery (write to precharge)
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tWTR_S = 0 #write to read (different bank group)
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tWTR_L = 0 #.. (same bank group)
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tCKESR = 0 #min time in sref
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tCKE = 0 #min time in pdna or pdnp
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tXP = 0 #min delay to row access command after pdnpx pdnax
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tXPDLL = 0 #min delay to row access command after pdnpx pdnax for dll commands
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tXSR = 0 #min delay to row access command after srefx
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tXSRDLL = 0 #min delay to row access command after srefx for dll commands
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tAL = 0 #additive delay (delayed execution in dram)
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tRFC = 0 #min ref->act delay
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def readConfigFromFiles(self, connection):
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print("Parsing dram configuration")
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memspec = getMemspec(connection)
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clkWithUnit = getClock(connection)
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self.clk = clkWithUnit[0]
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self.unitOfTime = clkWithUnit[1].lower()
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print(getMemconfig(connection))
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self.bankwiseLogic = getMemconfig(connection).findall("BankwiseLogic")[0].attrib['value']
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self.numberOfBanks = getIntValueFromConfigXML(memspec, "nbrOfBanks")
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self.burstLength = getIntValueFromConfigXML(memspec, "burstLength")
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self.memoryType = getValueFromConfigXML(memspec, "memoryType")
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self.dataRate = getIntValueFromConfigXML(memspec, "dataRate")
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if(self.memoryType == "WIDEIO_SDR"):
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self.nActivateWindow = 2;
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self.tRP = self.clk * getIntValueFromConfigXML(memspec, "RP")
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self.tRAS = self.clk * getIntValueFromConfigXML(memspec, "RAS")
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self.tRC = self.clk * getIntValueFromConfigXML(memspec, "RC")
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self.tRRD_S = self.clk * getIntValueFromConfigXML(memspec, "RRD")
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self.tRRD_L = self.tRRD_S
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self.tCCD_S = self.clk * getIntValueFromConfigXML(memspec, "CCD")
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self.tCCD_L = self.tCCD_S
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self.tRCD = self.clk * getIntValueFromConfigXML(memspec, "RCD")
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self.tNAW = self.clk * getIntValueFromConfigXML(memspec, "TAW")
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self.tRL = self.clk * getIntValueFromConfigXML(memspec, "RL")
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self.tWL = self.clk * getIntValueFromConfigXML(memspec, "WL")
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self.tWR = self.clk * getIntValueFromConfigXML(memspec, "WR")
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self.tWTR_S = self.clk * getIntValueFromConfigXML(memspec, "WTR")
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self.tWTR_L = self.tWTR_S
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self.tRTP = self.clk * getIntValueFromConfigXML(memspec, "RTP");
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self.tCKESR = self.clk * getIntValueFromConfigXML(memspec, "CKESR")
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self.tCKE = self.clk * getIntValueFromConfigXML(memspec, "CKE")
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self.tXP = self.clk * getIntValueFromConfigXML(memspec, "XP")
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self.tXPDLL = self.tXP
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self.tXSR = self.clk * getIntValueFromConfigXML(memspec, "XS")
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self.tXSRDLL = self.tXSR
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self.tAL = self.clk * getIntValueFromConfigXML(memspec, "AL")
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self.tRFC = self.clk * getIntValueFromConfigXML(memspec, "RFC")
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elif(self. memoryType == "DDR4"):
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self.nActivateWindow = 4;
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self.tRP = self.clk * getIntValueFromConfigXML(memspec, "RP");
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self.tRAS = self.clk * getIntValueFromConfigXML(memspec, "RAS");
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self.tRC = self.clk * getIntValueFromConfigXML(memspec, "RC");
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self.tRTP = self.clk * getIntValueFromConfigXML(memspec, "RTP");
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self.tRRD_S = self.clk * getIntValueFromConfigXML(memspec, "RRD_S");
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self.tRRD_L = self.clk * getIntValueFromConfigXML(memspec, "RRD_L");
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self.tCCD_S = self.clk * getIntValueFromConfigXML(memspec, "CCD_S");
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self.tCCD_L = self.clk * getIntValueFromConfigXML(memspec, "CCD_L");
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self.tRCD = self.clk * getIntValueFromConfigXML(memspec, "RCD");
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self.tNAW = self.clk * getIntValueFromConfigXML(memspec, "FAW");
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self.tRL = self.clk * getIntValueFromConfigXML(memspec, "RL");
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self.tWL = self.clk * getIntValueFromConfigXML(memspec, "WL");
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self.tWR = self.clk * getIntValueFromConfigXML(memspec, "WR");
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self.tWTR_S = self.clk * getIntValueFromConfigXML(memspec, "WTR_S");
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self.tWTR_L = self.clk * getIntValueFromConfigXML(memspec, "WTR_L");
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self.tCKESR = self.clk * getIntValueFromConfigXML(memspec, "CKESR");
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self.tCKE = self.clk * getIntValueFromConfigXML(memspec, "CKE");
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self.tXP = self.clk * getIntValueFromConfigXML(memspec, "XP");
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self.tXPDLL = self.clk * getIntValueFromConfigXML(memspec, "XPDLL");
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self.tXSR = self.clk * getIntValueFromConfigXML(memspec, "XS");
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self.tXSRDLL = self.clk * getIntValueFromConfigXML(memspec, "XSDLL");
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self.tAL = self.clk * getIntValueFromConfigXML(memspec, "AL");
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self.tRFC = self.clk * getIntValueFromConfigXML(memspec, "RFC");
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else:
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raise Exception("MemoryType not supported yet. Insert a coin into the coin machine and try again")
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def clkAlign(self, value):
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return math.ceil(1.0*value/self.clk)*self.clk
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def getWriteAccessTime(self):
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if(self.dataRate == 1):
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return self.clk*(self.burstLength - 1)
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elif (self.memoryType == "DDR4"):
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return self.clk*self.burstLength/self.dataRate
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def getReadAccessTime(self):
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return self.burstLength/self.dataRate * dramconfig.clk
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def __init__(self):
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pass
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dramconfig = DramConfig()
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def calculateReadLength(burstLength):
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return dramconfig.tRL + burstLength * dramconfig.clk
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def calculateWriteLength(burstLength):
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return dramconfig.tWL + burstLength * dramconfig.clk
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# ----------- test utils ---------------------------------------
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tests = []
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def test(function):
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tests.append(function)
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return function
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class TestResult(object):
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passed = True
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message = ''
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def __init__(self, passed = True, message = ''):
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self.passed = passed
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self.message = message
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def TestSuceeded():
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return TestResult()
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def TestFailed(message):
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return TestResult(False,message);
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def formatTime(time):
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return ('{0} {1}'.format(time, dramconfig.unitOfTime))
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# ----------- checks ---------------------------------------
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@test
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def commands_are_clockaligned(connection):
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"""Checks that all commands on the command bus are aligned to the system clock"""
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cursor = connection.cursor()
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query = "select ID,PhaseBegin,PhaseEnd from phases where phaseName NOT IN ('REQ','RESP') AND (phaseBegin%:clk!=0 OR phaseEnd%:clk!=0)"
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cursor.execute(query, {"clk": dramconfig.clk})
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result = cursor.fetchone()
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if(result != None):
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return TestFailed("Command with PhaseID {0} starts at {1} and ends at. One of those times. is not aligned to system clock ({2})"
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.format(result[0], formatTime(result[1]), formatTime(result[2]), formatTime(dramconfig.clk)))
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return TestSuceeded()
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@test
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def commandbus_slots_are_used_once(connection):
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"""Checks that no two phases on the command bus start at the same time"""
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cursor = connection.cursor()
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if dramconfig.bankwiseLogic:
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excludedPhases = "('REQ','RESP','PRE_ALL')"
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else:
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excludedPhases = "('REQ','RESP','PRE_ALL','PDNA','PDNP','SREF','AUTO_REFRESH')"
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query = """SELECT PhaseBegin,count FROM (SELECT phaseBegin,count(phasebegin) AS count
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FROM Phases WHERE PhaseName NOT IN """ + excludedPhases + """ AND phasebegin>0 GROUP BY phaseBegin) WHERE count>1"""
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cursor.execute(query)
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result = cursor.fetchone()
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if(result != None):
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return TestFailed("Slot on commandbus at time {0} is used multiple times".format(formatTime(result[0])))
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return TestSuceeded()
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@test
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def phase_transitions_are_valid(connection):
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"""Checks that all transition of two consequtive phases on the same bank are valid"""
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cursor = connection.cursor()
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validTransitions = {}
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if(dramconfig.bankwiseLogic):
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validTransitions['PRE'] = set(['ACT', 'AUTO_REFRESH'])
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validTransitions['ACT'] = set(['RD', 'RDA', 'WR', 'WRA', 'PRE', 'PRE_ALL'])
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validTransitions['RD'] = set(['PRE','RD','RDA', 'WR', 'WRA', 'PDNA'])
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validTransitions['WR'] = set(['PRE', 'RD','RDA', 'WR', 'WRA', 'PDNA'])
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validTransitions['RDA'] = set(['ACT', 'AUTO_REFRESH', 'PDNP'])
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validTransitions['WRA'] = set(['ACT', 'AUTO_REFRESH', 'PDNP'])
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validTransitions['AUTO_REFRESH'] = set(['ACT', 'PDNP', 'SREF'])
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validTransitions['PDNA'] = set(['PRE', 'RD','RDA', 'WR', 'WRA', 'AUTO_REFRESH'])
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validTransitions['PDNP'] = set(['ACT', 'AUTO_REFRESH'])
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validTransitions['SREF'] = set(['ACT'])
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else:
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validTransitions['PRE'] = set(['ACT'])
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validTransitions['PRE_ALL'] = set(['AUTO_REFRESH'])
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validTransitions['ACT'] = set(['RD', 'RDA', 'WR', 'WRA', 'PRE_ALl'])
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validTransitions['RD'] = set(['PRE', 'PRE_ALL','RD','RDA', 'WR', 'WRA', 'PDNA'])
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validTransitions['WR'] = set(['PRE', 'PRE_ALL','RD','RDA', 'WR', 'WRA', 'PDNA'])
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validTransitions['RDA'] = set(['PRE_ALL', 'ACT', 'AUTO_REFRESH', 'PDNA', 'PDNP'])
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validTransitions['WRA'] = set(['PRE_ALL', 'ACT', 'AUTO_REFRESH', 'PDNA', 'PDNP'])
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validTransitions['AUTO_REFRESH'] = set(['PRE_ALL', 'ACT','AUTO_REFRESH', 'PDNA', 'PDNP', 'SREF'])
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validTransitions['PDNA'] = set(['PRE','PRE_ALL','ACT', 'RD', 'RDA', 'WR', 'WRA', 'AUTO_REFRESH', 'PDNA', 'PDNP'])
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validTransitions['PDNP'] = set(['PRE_ALL', 'ACT', 'AUTO_REFRESH', 'PDNA', 'PDNP'])
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validTransitions['SREF'] = set(['PRE_ALL', 'ACT', 'AUTO_REFRESH', 'PDNA', 'PDNP'])
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query = """SELECT PhaseName, phases.ID FROM phases INNER JOIN transactions ON phases.transact=transactions.ID WHERE TBank=:bank
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AND PhaseName NOT IN ('REQ','RESP') ORDER BY PhaseBegin"""
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for bankNumber in range(dramconfig.numberOfBanks):
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cursor.execute(query, {"bank": bankNumber})
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lastRow = cursor.fetchone()
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for currentRow in cursor:
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currentPhase = currentRow[0]
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lastPhase = lastRow[0]
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if(currentPhase not in validTransitions[lastPhase]):
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return TestFailed("Phase {0}({1}) is not allowed to follow phase {2}({3})".format(currentRow[1],currentPhase,lastRow[1],lastPhase))
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lastRow = currentRow
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return TestSuceeded()
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def timing_constraint(FirstPhase, SecondPhase):
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FirstPhaseName = FirstPhase[0]
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SecondPhaseName = SecondPhase[0]
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if(FirstPhaseName == "PRE" or FirstPhaseName == "PRE_ALL"):
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return dramconfig.tRP
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elif(FirstPhaseName == "ACT"):
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return dramconfig.tRCD
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elif(FirstPhaseName == "RD"):
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if(SecondPhaseName in ["PRE, PRE_ALL"]):
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return dramconfig.tRTP
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elif(SecondPhaseName in ["RD, RDA"]):
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return max(dramconfig.tCCD_L, getReadAccessTime())
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elif(SecondPhase in ["WR","WRA"]):
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return dramconfig.tRL + getReadAccessTime() - dramconfig.tWL + 2*dramconfig.clk
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elif(SecondPhase == "PDNA" ):
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return dramconfig.tRL + getReadAccessTime() + dramconfig.clk
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elif(FirstPhaseName == "WR"):
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if(SecondPhaseName in ["PRE, PRE_ALL", "PDNA"]):
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return dramconfig.tWL + dramconfig.getWriteAccessTime() + dramconfig.tWR
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elif(SecondPhaseName in ["RD, RDA"]):
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return dramconfig.tWL + dramconfig.getWriteAccessTime() + dramconfig.tWTR_L
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elif(SecondPhaseName in ["WR, WRA"]):
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return max(dramconfig.tCCD_L, burstlength/dramconfig.dataRate)
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elif(FirstPhaseName == "RDA"):
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if(SecondPhaseName in ["ACT", "PRE_ALL", "AUTO_REFRESH"]):
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return dramconfig.tRTP + dramconfig.tRP
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elif(SecondPhaseName in ["PDNA","PDNP"]):
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return dramconfig.tRL + getReadAccessTime() + dramconfig.clk
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elif(FirstPhaseName == "WRA"):
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if(SecondPhaseName in ["ACT", "PRE_ALL", "AUTO_REFRESH"]):
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return dramconfig.tWL + getWriteAccessTime() + dramconfig.tWR + dramconfig.tRP
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elif(SecondPhaseName in ["PDNA","PDNP"]):
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return dramconfig.tWL + dramconfig.getWriteAccessTime() + dramconfig.tWR + dramconfig.clk
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elif(FirstPhaseName == "AUTO_REFRESH"):
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return dramconfig.tRFC
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elif(FirstPhaseName in ["PDNA","PDNP"]):
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return (FirstPhase[3] - FirstPhase[2]) + dramconfig.tXP - dramconfig.clk
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elif(FirstPhaseName == "SREF"):
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return (FirstPhase[3] - FirstPhase[2]) + dramconfig.tXSR - dramconfig.clk
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return 0
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@test
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def timing_constraits_on_the_same_bank_hold(connection):
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"""Checks that all transitions of two consequtive phases on the same bank meet their timing constraints"""
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cursor = connection.cursor()
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validTransitions = {}
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query = """SELECT PhaseName, phases.ID,PhaseBegin,PhaseEnd FROM phases INNER JOIN transactions ON phases.transact=transactions.ID WHERE TBank=:bank
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AND PhaseName NOT IN ('REQ','RESP') ORDER BY PhaseBegin"""
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for bankNumber in range(dramconfig.numberOfBanks):
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cursor.execute(query, {"bank": bankNumber})
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lastRow = cursor.fetchone()
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for currentRow in cursor:
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constraint = timing_constraint(lastRow,currentRow)
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if(currentRow[2] - lastRow[2] + constraint < 0):
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return TestFailed("Phase {0}({1}) starts {2} after Start of Phase {3}({4}). Minimal time is {5}".format(
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currentRow[1],currentRow[0],formatTime(currentRow[2]-lastRow[2]),lastRow[1],lastRow[0], formatTime(constraint)))
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lastRow = currentRow
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return TestSuceeded()
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@test
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def row_buffer_is_used_correctly(connection):
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"""Checks that each bank's row buffer is used correctly"""
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cursor = connection.cursor()
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query = """SELECT PhaseName, phases.ID FROM phases INNER JOIN transactions ON phases.transact=transactions.ID WHERE TBank=:bank
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AND PhaseName NOT IN ('REQ','RESP') ORDER BY PhaseBegin"""
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#phases that precharge the bank and close the rowbuffer
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prechargingPhases = set(['PRE','PRE_ALL','RDA','WRA'])
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#phases that require the bank to be in active state and the rowbuffer to be opened
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accessingPhases = set(['RD','RDA', 'WR', 'WRA', 'PRE'])
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#phases that require the bank to be in precharged state and the robuffer to be closed
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idlePhases = set(['ACT', 'PDNP', 'AUTO_REFRESH', 'SREF'])
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for bankNumber in range(dramconfig.numberOfBanks):
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cursor.execute(query,{"bank": bankNumber})
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rowBufferIsClosed = True
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for currentRow in cursor:
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if(currentRow[0] in accessingPhases and rowBufferIsClosed == True):
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return TestFailed("Phase {0}({1}) acesses a closed rowbuffer".format(currentRow[1], currentRow[0]))
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if(currentRow[0] in idlePhases and rowBufferIsClosed == False):
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return TestFailed("Phase {0}({1}) needs a closed rowbuffer".format(currentRow[1], currentRow[0]))
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if(currentRow[0] == 'ACT'):
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rowBufferIsClosed = False
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if(currentRow[0] in prechargingPhases):
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rowBufferIsClosed = True
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return TestSuceeded()
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#----------- activate checks ---------------------------------------
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@test
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def activate_to_activate_holds(connection):
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"""Checks that all activates are far enough apart(JESD229 229, P. 27)"""
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cursor = connection.cursor()
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cursor.execute("SELECT phases.ID,PhaseBegin,TBankGroup FROM Phases INNER JOIN transactions ON phases.transact=transactions.ID WHERE PhaseName = 'ACT' ORDER BY PhaseBegin")
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lastRow = cursor.fetchone()
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for currentRow in cursor:
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timeBetweenActivates = currentRow[1] - lastRow[1]
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if (currentRow[2] == lastRow[2]):
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minTime = dramconfig.tRRD_L
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else:
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minTime = dramconfig.tRRD_S
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if(timeBetweenActivates < minTime):
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return TestFailed("Activates with PhaseIDs {0} and {1} are {2} apart. Minimum time between two activates is {3}".
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format(currentRow[0], lastRow[0],formatTime(timeBetweenActivates), formatTime(minTime)))
|
|
|
|
lastRow = currentRow
|
|
|
|
return TestSuceeded()
|
|
|
|
|
|
@test
|
|
def activate_to_activate_on_same_bank_holds(connection):
|
|
"""Checks that all activates on the same bank are far enough apart (JEDEC 229, P. 27)"""
|
|
cursor = connection.cursor()
|
|
query = "SELECT Phases.ID,PhaseBegin from Phases INNER JOIN Transactions ON Phases.Transact = Transactions.ID WHERE PhaseName = 'ACT' AND TBANK = :bank ORDER BY PhaseBegin"
|
|
|
|
for bankNumber in range(dramconfig.numberOfBanks):
|
|
cursor.execute(query,{"bank": bankNumber})
|
|
lastRow = cursor.fetchone()
|
|
|
|
for currentRow in cursor:
|
|
timeBetweenActivates = currentRow[1] - lastRow[1];
|
|
if(timeBetweenActivates < dramconfig.tRC):
|
|
return TestFailed("Activates with PhaseIDs {0} and {1} are {2} apart. Minimum time between two activates is {3}, since they are on the same bank({4})".
|
|
format(currentRow[0], lastRow[0],formatTime(timeBetweenActivates), dramconfig.tRC))
|
|
else:
|
|
lastRow = currentRow
|
|
|
|
return TestSuceeded()
|
|
|
|
@test
|
|
def n_activate_window_holds(connection):
|
|
"""Checks that the n-Activate constraint is met everywhere(JEDEC 229, P. 27)"""
|
|
cursor = connection.cursor()
|
|
cursor.execute("SELECT ID,PhaseBegin from Phases WHERE PhaseName = 'ACT' ORDER BY PhaseBegin")
|
|
activateWindow = []
|
|
|
|
for currentRow in cursor:
|
|
activateWindow.append(currentRow[1])
|
|
if(len(activateWindow) > dramconfig.nActivateWindow + 1):
|
|
activateWindow.pop(0)
|
|
if(activateWindow[dramconfig.nActivateWindow] - activateWindow[0] < dramconfig.tNAW):
|
|
return TestFailed("Activate with PhaseID {0} and the {1} preceeding activates violate the '{1} activate window' constraint."
|
|
" No more than {1} activates should be in rolling time window of {2}".format(currentRow[0], dramconfig.nActivateWindow,formatTime(dramconfig.tNAW)))
|
|
return TestSuceeded()
|
|
|
|
|
|
# ----------- read/write checks ---------------------------------------
|
|
@test
|
|
def read_to_read_holds(connection):
|
|
"""Check that the read operations do not intefere with each other on the data bus"""
|
|
cursor = connection.cursor()
|
|
cursor.execute("SELECT phases.ID,PhaseBegin,TBankGroup FROM Phases INNER JOIN transactions ON phases.transact=transactions.ID WHERE PhaseName IN ('RD','RDA') ORDER BY PhaseBegin")
|
|
lastRow = cursor.fetchone()
|
|
|
|
for currentRow in cursor:
|
|
timeBetweenReads = currentRow[1] - lastRow[1]
|
|
if (currentRow[2] == lastRow[2]):
|
|
minTime = max(dramconfig.tCCD_L,dramconfig.getReadAccessTime())
|
|
else:
|
|
minTime = max(dramconfig.tCCD_S,dramconfig.getReadAccessTime())
|
|
if(timeBetweenReads < minTime):
|
|
return TestFailed("Reads with PhaseIDs {0} and {1} are {2} apart. Minimum time between two reads is {3}".format(currentRow[0], lastRow[0],formatTime(timeBetweenReads), minTime))
|
|
lastRow = currentRow
|
|
|
|
return TestSuceeded()
|
|
|
|
|
|
@test
|
|
def write_to_write_holds(connection):
|
|
"""Check that the write operations do not intefere with each other on the data bus"""
|
|
|
|
cursor = connection.cursor()
|
|
cursor.execute("SELECT phases.ID,PhaseBegin,TBankGroup FROM Phases INNER JOIN transactions ON phases.transact=transactions.ID WHERE PhaseName IN ('WR','WRA') ORDER BY PhaseBegin")
|
|
lastRow = cursor.fetchone()
|
|
|
|
for currentRow in cursor:
|
|
timeBetweenWrites = currentRow[1] - lastRow[1]
|
|
if (currentRow[2] == lastRow[2]):
|
|
minTime = max(dramconfig.tCCD_L,dramconfig.getWriteAccessTime())
|
|
else:
|
|
minTime = max(dramconfig.tCCD_S,dramconfig.getWriteAccessTime())
|
|
if(timeBetweenWrites < minTime):
|
|
return TestFailed("Writes with PhaseIDs {0} and {1} are {2} apart. Minimum time between two writes is {3}".format(currentRow[0], lastRow[0],formatTime(timeBetweenWrites), minTime))
|
|
lastRow = currentRow
|
|
return TestSuceeded()
|
|
|
|
@test
|
|
def write_to_read_and_read_to_write_hold(connection):
|
|
"""Checks that read and write operation do not interfere with each other on the data bus
|
|
and that the write-to-read constraint is met"""
|
|
|
|
cursor = connection.cursor()
|
|
query = """SELECT Phases.ID,PhaseBegin,PhaseName,TBankGroup from Phases INNER JOIN Transactions ON Phases.Transact = Transactions.ID
|
|
WHERE PhaseName IN ('RD','WR','RDA','WRA') ORDER BY PhaseBegin"""
|
|
|
|
cursor.execute(query)
|
|
lastRow = cursor.fetchone()
|
|
|
|
for currentRow in cursor:
|
|
|
|
if(currentRow[2] in ["RD","RDA"] and lastRow[2] in ["WR","WRA"]):
|
|
#write to read
|
|
if (currentRow[3] == lastRow[3]):
|
|
tWTR = dramconfig.tWTR_L
|
|
else:
|
|
tWTR = dramconfig.tWTR_S
|
|
|
|
minWriteToRead = dramconfig.tWL + dramconfig.getWriteAccessTime() + tWTR
|
|
writeToRead = currentRow[1] - lastRow[1]
|
|
|
|
if(writeToRead < minWriteToRead ):
|
|
return TestFailed("Read {0} starts {1} after start of write {2}. Minimum time is {3}".
|
|
format(currentRow[0],formatTime(writeToRead),lastRow[0], formatTime(minWriteToRead)))
|
|
|
|
elif(currentRow[2] in ["WR","WRA"] and lastRow[2] in ["RD","RDA"]):
|
|
#read to write
|
|
minReadToWrite = dramconfig.tRL + dramconfig.getReadAccessTime() - dramconfig.tWL + dramconfig.clk * 2
|
|
readToWrite = currentRow[1] - lastRow[1]
|
|
if(readToWrite < minReadToWrite ):
|
|
return TestFailed("Write {0} starts {1} after start of read {2}. Minimum time is {3}".
|
|
format(currentRow[0],formatTime(readToWrite),lastRow[0], formatTime(minWriteToRead)))
|
|
|
|
lastRow = currentRow
|
|
|
|
return TestSuceeded()
|
|
|
|
|
|
@test
|
|
def read_holds_dll_constraint_after_sref(connection):
|
|
"""Checks that all read operations are delayed long enough after the end of the self refresh powerdown state"""
|
|
|
|
cursor = connection.cursor()
|
|
query = """SELECT Phases.ID,PhaseBegin,PhaseName,TBankGroup from Phases INNER JOIN Transactions ON Phases.Transact = Transactions.ID AND TBank = :bank
|
|
WHERE PhaseName IN ('RD', 'RDA', 'SREF') ORDER BY PhaseBegin"""
|
|
|
|
|
|
for bankNumber in range(dramconfig.numberOfBanks):
|
|
cursor.execute(query,{"bank": bankNumber})
|
|
lastRow = cursor.fetchone()
|
|
for currentRow in cursor:
|
|
if(currentRow[2] in ["RD","RDA"] and lastRow[2] == 'SREF'):
|
|
srefEndToRead = currentRow[1] - (lastRow[1] - dramconfig.clk)
|
|
if(srefEndToRead < dramconfig.tXSRDLL ):
|
|
return TestFailed("Read {0} starts {1} after end of sref {2}. Minimum time is {3}".
|
|
format(currentRow[0],formatTime(srefEndToRead),lastRow[0], formatTime(dramconfig.tXSRDLL)))
|
|
lastRow = currentRow
|
|
return TestSuceeded()
|
|
|
|
# ----------- powerdown checks ---------------------------------------
|
|
|
|
# @test
|
|
# def sref_active_for_minimal_time(connection):
|
|
# """Checks that after entering self refresh powerndown state, the state is active for a minimal time (JEDEC 229, P. 41)"""
|
|
#
|
|
# cursor = connection.cursor()
|
|
# cursor.execute("SELECT ID, PhaseEnd-clk-PhaseBegin FROM Phases, GeneralInfo WHERE PhaseName = 'SREF'")
|
|
# for currentRow in cursor:
|
|
# if(currentRow[1] < dramconfig.tCKESR):
|
|
# return TestFailed("SREF with ID {0} is {1} long. Minimal time in SREF is {2}".format(currentRow[0], formatTime(currentRow[1]), dramconfig.tCKESR))
|
|
# return TestSuceeded()
|
|
|
|
# @test
|
|
# def pdna_pdnp_active_for_minimal_time(connection):
|
|
# """Checks that after entering active/precharged powerdown, the state is active for a minimal time (JEDEC 229, P. 41)"""
|
|
#
|
|
# cursor = connection.cursor()
|
|
# cursor.execute("SELECT ID,PhaseName, PhaseEnd-PhaseBegin FROM Phases, GeneralInfo WHERE PhaseName IN ('PDNA', 'PDNP') ")
|
|
# for currentRow in cursor:
|
|
# if(currentRow[2] < dramconfig.tCKE):
|
|
# return TestFailed("{0} with ID {1} is {2} long. Minimal time in SREF is {3}".format(currentRow[1], currentRow[0], formatTime(currentRow[2]), dramconfig.tCKE))
|
|
# return TestSuceeded()
|
|
|
|
# -------------------------- interface methods --------------------
|
|
|
|
def runTests(pathToTrace):
|
|
connection = sqlite3.connect(pathToTrace)
|
|
dramconfig.readConfigFromFiles(connection)
|
|
|
|
testResults = []
|
|
numberOfFailedTest = 0
|
|
print("================================")
|
|
print("RUNNING TEST ON {0}".format(pathToTrace))
|
|
|
|
print("-----------------------------\n")
|
|
|
|
for test in tests:
|
|
testResult = test(connection)
|
|
testName = test.__name__.replace("_"," ")
|
|
testResults.append((testName, testResult.passed,testResult.message))
|
|
|
|
if(testResult.passed):
|
|
print("[passed] {0}".format(testName))
|
|
else:
|
|
print("[failed] {0} failed. Message: {1}".format(testName, testResult.message))
|
|
numberOfFailedTest = numberOfFailedTest + 1
|
|
|
|
print("\n-----------------------------")
|
|
|
|
if(numberOfFailedTest == 0):
|
|
print("All tests passed")
|
|
else:
|
|
print("{0} of {1} tests passed".format(len(tests) - numberOfFailedTest,len(tests)))
|
|
|
|
print("================================")
|
|
connection.close()
|
|
|
|
return testResults
|
|
|
|
if __name__ == "__main__":
|
|
sys.stdout = os.fdopen(sys.stdout.fileno(), 'w')
|
|
for i in range(1,len(sys.argv)):
|
|
runTests(sys.argv[i])
|
|
|