Files
DRAMSys/dram/resources/simulations/sim-batch.xml
2015-02-17 09:22:58 +01:00

50 lines
1.7 KiB
XML

<!-- <simulation>
<simconfig>
<Debug value="1" />
<DatabaseRecording value="1" />
<PowerAnalysys value="0" />
</simconfig>
<memspecs>
<memspec src="/home/gernhard2/projects/dram.vp.system/dram/resources/configs/memspecs/WideIO.xml"></memspec>
</memspecs>
<addressmappings>
<addressmapping src="/home/gernhard2/projects/dram.vp.system/dram/resources/configs/amconfigs/am_wideio.xml"></addressmapping>
</addressmappings>
<memconfigs>
<memconfig src="/home/gernhard2/projects/dram.vp.system/dram/resources/configs/memconfigs/fifo.xml"/>
</memconfigs>
<tracesetups>
<tracesetup id="fifo">
<device clkMhz="200">test.stl</device>-
<device clkMhz="200">mediabench-epic_32.stl</device>
</tracesetup>
</tracesetups>
</simulation>
-->
<simulation>
<simconfig>
<Debug value="1" />
<DatabaseRecording value="1" />
<PowerAnalysys value="1" />
</simconfig>
<memspecs>
<memspec src="/home/jungma/projects/dram.vp.system/dram/resources/configs/memspecs/WideIO.xml"></memspec>
</memspecs>
<addressmappings>
<addressmapping src="/home/jungma/projects/dram.vp.system/dram/resources/configs/amconfigs/am_wideio.xml"></addressmapping>
</addressmappings>
<memconfigs>
<memconfig src="/home/jungma/projects/dram.vp.system/dram/resources/configs/memconfigs/fifo.xml"/>
</memconfigs>
<tracesetups>
<tracesetup id="fifo">
<device clkMhz="200">voco2.stl</device>
</tracesetup>
</tracesetups>
</simulation>