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DRAMSys/configs/memspec/JEDEC_512Mbx16_16B_LPDDR5-3200.json

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{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 4,
"nbrOfBankGroups": 1,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 32768,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8
},
"memoryId": "JEDEC_512Mbx16_16B_LPDDR5-3200",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 15,
"RCD_S": 15,
"PPD": 2,
"RPab": 17,
"RPpb": 15,
"RAS": 34,
"RCab": 51,
"RCpb": 48,
"FAW": 16,
"RRD": 4,
"RL": 18,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 2,
"RPRE": 0,
"RPST": 0,
"WL": 10,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 28,
"WTR_L": 10,
"WTR_S": 5,
"CCDMW": 16,
"REFI": 3124,
"REFIpb": 390,
"RFCab": 168,
"RFCpb": 96,
"RTRS": 1,
"BL_n_min_16": 4,
"BL_n_max_16": 4,
"BL_n_L_16": 4,
"BL_n_S_16": 4,
"BL_n_min_32": 8,
"BL_n_max_32": 8,
"BL_n_L_32": 8,
"BL_n_S_32": 8,
"pbR2act": 6,
"pbR2pbR": 72,
"clkMhz": 800
}
}
}