82 lines
3.0 KiB
C++
82 lines
3.0 KiB
C++
/*
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* Copyright (c) 2019, RPTU Kaiserslautern-Landau
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
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* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Author: Lukas Steiner
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*/
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#ifndef CHECKERWIDEIO2_H
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#define CHECKERWIDEIO2_H
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#include "DRAMSys/controller/checker/CheckerIF.h"
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#include "DRAMSys/configuration/memspec/MemSpecWideIO2.h"
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#include "DRAMSys/configuration/Configuration.h"
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#include <queue>
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#include <vector>
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namespace DRAMSys
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{
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class CheckerWideIO2 final : public CheckerIF
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{
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public:
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explicit CheckerWideIO2(const Configuration& config);
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[[nodiscard]] sc_core::sc_time timeToSatisfyConstraints(Command command, const tlm::tlm_generic_payload& payload) const override;
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void insert(Command command, const tlm::tlm_generic_payload& payload) override;
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private:
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const MemSpecWideIO2 *memSpec;
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std::vector<ControllerVector<Bank, sc_core::sc_time>> lastScheduledByCommandAndBank;
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std::vector<ControllerVector<Rank, sc_core::sc_time>> lastScheduledByCommandAndRank;
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std::vector<sc_core::sc_time> lastScheduledByCommand;
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sc_core::sc_time lastCommandOnBus;
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// Four activate window
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ControllerVector<Rank, std::queue<sc_core::sc_time>> last4Activates;
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const sc_core::sc_time scMaxTime = sc_core::sc_max_time();
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sc_core::sc_time tBURST;
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sc_core::sc_time tRDPRE;
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sc_core::sc_time tRDPDEN;
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sc_core::sc_time tRDWR;
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sc_core::sc_time tRDWR_R;
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sc_core::sc_time tWRPRE;
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sc_core::sc_time tWRPDEN;
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sc_core::sc_time tWRAPDEN;
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sc_core::sc_time tWRRD;
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sc_core::sc_time tWRRD_R;
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};
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} // namespace DRAMSys
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#endif // CHECKERWIDEIO2_H
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