Files
DRAMSys/extensions/configs/LPDDR5/memspec/JEDEC_512Mbx16_16B_LPDDR5X-1600.json
Derek Christ 1ef2b3bd9c chore: update DRAMUtils version
Update the DRAMUtils version and fix all configs that now require DBI
parameters for the memimpedance spec.
2025-11-21 16:02:11 +01:00

141 lines
3.6 KiB
JSON

{
"memspec": {
"memarchitecturespec": {
"burstLength": 16,
"dataRate": 4,
"nbrOfBankGroups": 1,
"nbrOfBanks": 16,
"nbrOfColumns": 1024,
"nbrOfRows": 32768,
"nbrOfRanks": 1,
"nbrOfDevices": 1,
"nbrOfChannels": 1,
"width": 16,
"per2BankOffset": 8,
"WCKalwaysOn": false,
"maxBurstLength": 16
},
"mempowerspec": {
"vdd1": 0.0,
"idd01": 0.0,
"idd2n1": 0.0,
"idd3n1": 0.0,
"idd4r1": 0.0,
"idd4w1": 0.0,
"idd51": 0.0,
"idd5pb1": 0.0,
"idd61": 0.0,
"idd6ds1": 0.0,
"idd2p1": 0.0,
"idd3p1": 0.0,
"vdd2h": 0.0,
"idd02h": 0.0,
"idd2n2h": 0.0,
"idd3n2h": 0.0,
"idd4r2h": 0.0,
"idd4w2h": 0.0,
"idd52h": 0.0,
"idd5pb2h": 0.0,
"idd62h": 0.0,
"idd6ds2h": 0.0,
"idd2p2h": 0.0,
"idd3p2h": 0.0,
"vdd2l": 0.0,
"idd02l": 0.0,
"idd2n2l": 0.0,
"idd3n2l": 0.0,
"idd4r2l": 0.0,
"idd4w2l": 0.0,
"idd52l": 0.0,
"idd5pb2l": 0.0,
"idd62l": 0.0,
"idd6ds2l": 0.0,
"idd2p2l": 0.0,
"idd3p2l": 0.0,
"vddq": 0.0,
"iBeta_vdd1": 0.0,
"iBeta_vdd2h": 0.0,
"iBeta_vdd2l": 0.0
},
"bankwisespec": {
"factRho": 1.0
},
"memimpedancespec": {
"ck_termination": true,
"ck_R_eq": 1e6,
"ck_dyn_E": 1e-12,
"ca_termination": true,
"ca_R_eq": 1e6,
"ca_dyn_E": 1e-12,
"rdq_termination": true,
"rdq_R_eq": 1e6,
"rdq_dyn_E": 1e-12,
"wdq_termination": true,
"wdq_R_eq": 1e6,
"wdq_dyn_E": 1e-12,
"wck_termination": true,
"wck_R_eq": 1e6,
"wck_dyn_E": 1e-12,
"rdqs_termination": true,
"rdqs_R_eq": 1e6,
"rdqs_dyn_E": 1e-12,
"rdbi_termination": true,
"rdbi_R_eq": 1e6,
"rdbi_dyn_E": 1e-12,
"wdbi_termination": true,
"wdbi_R_eq": 1e6,
"wdbi_dyn_E": 1e-12
},
"memoryId": "JEDEC_512Mbx16_16B_LPDDR5X-1600",
"memoryType": "LPDDR5",
"memtimingspec": {
"RCD_L": 4,
"RCD_S": 2,
"PPD": 2,
"RPab": 5,
"RPpb": 4,
"RAS": 9,
"RCab": 13,
"RCpb": 12,
"FAW": 3,
"RRD": 2,
"RL": 5,
"WCK2CK": 0,
"WCK2DQO": 1,
"RBTP": 0,
"RPRE": 0,
"RPST": 0,
"WL": 3,
"WCK2DQI": 0,
"WPRE": 0,
"WPST": 0,
"WR": 7,
"WTR_L": 4,
"WTR_S": 4,
"CCDMW": 8,
"REFI": 781,
"REFIpb": 97,
"RFCab": 42,
"RFCpb": 24,
"RFMab": 42,
"RFMpb": 24,
"RTRS": 1,
"BL_n_min_16": 2,
"BL_n_max_16": 2,
"BL_n_L_16": 2,
"BL_n_S_16": 2,
"BL_n_min_32": 4,
"BL_n_max_32": 4,
"BL_n_L_32": 4,
"BL_n_S_32": 4,
"pbR2act": 2,
"pbR2pbR": 18,
"tCK": 5000e-12
}
}
}