214 lines
5.9 KiB
JSON
214 lines
5.9 KiB
JSON
{
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"simulation": {
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"addressmapping": {
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"BANKGROUP_BIT": [
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5,
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6
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],
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"BANK_BIT": [
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7,
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8
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],
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"BYTE_BIT": [
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0
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],
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"COLUMN_BIT": [
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1,
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2,
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3,
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4,
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9,
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10,
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11,
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12,
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13,
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14
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],
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"ROW_BIT": [
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15,
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16,
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17,
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18,
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19,
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20,
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21,
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22,
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23,
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24,
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25,
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26,
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27,
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28,
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29,
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30
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]
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},
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"mcconfig": {
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"Arbiter": "Simple",
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"CmdMux": "Oldest",
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"MaxActiveTransactions": 128,
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"PagePolicy": "Open",
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"PowerDownPolicy": "NoPowerDown",
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"RefreshManagement": false,
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"RefreshMaxPostponed": 0,
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"RefreshMaxPulledin": 0,
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"RefreshPolicy": "Per2Bank",
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"RequestBufferSize": 8,
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"RespQueue": "Fifo",
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"Scheduler": "FrFcfs",
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"SchedulerBuffer": "Bankwise"
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},
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"memspec": {
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"memarchitecturespec": {
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"burstLength": 16,
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"dataRate": 8,
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"nbrOfBankGroups": 4,
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"nbrOfBanks": 16,
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"nbrOfChannels": 1,
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"nbrOfColumns": 1024,
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"nbrOfDevices": 1,
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"nbrOfRanks": 1,
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"nbrOfRows": 65536,
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"per2BankOffset": 8,
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"width": 16,
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"WCKalwaysOn": false,
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"maxBurstLength": 16
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},
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"memoryId": "JEDEC_1Gbx16_BG_LPDDR5-6400",
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"memoryType": "LPDDR5",
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"memtimingspec": {
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"BL_n_L_16": 4,
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"BL_n_L_32": 8,
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"BL_n_S_16": 2,
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"BL_n_S_32": 2,
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"BL_n_max_16": 4,
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"BL_n_max_32": 8,
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"BL_n_min_16": 2,
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"BL_n_min_32": 6,
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"CCDMW": 16,
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"FAW": 16,
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"PPD": 2,
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"RAS": 34,
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"RBTP": 4,
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"RCD_L": 15,
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"RCD_S": 15,
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"RCab": 51,
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"RCpb": 48,
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"REFI": 3124,
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"REFIpb": 390,
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"RFCab": 224,
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"RFCpb": 112,
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"RL": 17,
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"RPRE": 0,
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"RPST": 0,
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"RPab": 17,
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"RPpb": 15,
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"RRD": 4,
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"RTRS": 1,
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"WCK2CK": 0,
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"WCK2DQI": 0,
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"WCK2DQO": 1,
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"WL": 9,
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"WPRE": 0,
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"WPST": 0,
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"WR": 28,
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"WTR_L": 10,
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"WTR_S": 5,
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"pbR2act": 6,
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"pbR2pbR": 72,
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"tCK": 800e-12
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},
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"mempowerspec": {
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"vdd1": 0.0,
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"idd01": 0.0,
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"idd2n1": 0.0,
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"idd3n1": 0.0,
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"idd4r1": 0.0,
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"idd4w1": 0.0,
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"idd51": 0.0,
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"idd5pb1": 0.0,
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"idd61": 0.0,
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"idd6ds1": 0.0,
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"idd2p1": 0.0,
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"idd3p1": 0.0,
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"vdd2h": 0.0,
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"idd02h": 0.0,
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"idd2n2h": 0.0,
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"idd3n2h": 0.0,
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"idd4r2h": 0.0,
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"idd4w2h": 0.0,
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"idd52h": 0.0,
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"idd5pb2h": 0.0,
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"idd62h": 0.0,
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"idd6ds2h": 0.0,
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"idd2p2h": 0.0,
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"idd3p2h": 0.0,
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"vdd2l": 0.0,
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"idd02l": 0.0,
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"idd2n2l": 0.0,
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"idd3n2l": 0.0,
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"idd4r2l": 0.0,
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"idd4w2l": 0.0,
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"idd52l": 0.0,
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"idd5pb2l": 0.0,
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"idd62l": 0.0,
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"idd6ds2l": 0.0,
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"idd2p2l": 0.0,
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"idd3p2l": 0.0,
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"vddq": 0.0,
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"iBeta_vdd1": 0.0,
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"iBeta_vdd2h": 0.0,
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"iBeta_vdd2l": 0.0
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},
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"bankwisespec": {
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"factRho": 1.0
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},
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"memimpedancespec": {
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"ck_termination": true,
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"ck_R_eq": 1e6,
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"ck_dyn_E": 1e-12,
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"ca_termination": true,
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"ca_R_eq": 1e6,
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"ca_dyn_E": 1e-12,
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"rdq_termination": true,
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"rdq_R_eq": 1e6,
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"rdq_dyn_E": 1e-12,
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"wdq_termination": true,
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"wdq_R_eq": 1e6,
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"wdq_dyn_E": 1e-12,
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"wck_termination": true,
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"wck_R_eq": 1e6,
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"wck_dyn_E": 1e-12,
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"rdqs_termination": true,
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"rdqs_R_eq": 1e6,
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"rdqs_dyn_E": 1e-12
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}
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},
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"simconfig": {
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"AddressOffset": 0,
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"CheckTLM2Protocol": false,
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"DatabaseRecording": true,
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"Debug": false,
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"EnableWindowing": false,
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"PowerAnalysis": false,
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"SimulationName": "lpddr5",
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"SimulationProgressBar": true,
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"StoreMode": "NoStorage",
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"UseMalloc": false,
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"WindowSize": 1000
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},
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"simulationid": "lpddr5-example",
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"tracesetup": [
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{
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"type": "player",
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"clkMhz": 1600,
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"dataLength": 32,
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"name": "traces/trace_lpddr5.stl"
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}
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]
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}
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}
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