Derek Christ 539a525f3d Fix DDR3 regression ...

Using the new tCK entry in the memspecs, there was a small power deviation in the database

2024-02-23 12:04:29 +01:00

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DDR3

Fix DDR3 regression

2024-02-23 12:04:29 +01:00

DDR4

Migrate from clkMhz to tCK entry in memspecs

2024-02-23 12:04:22 +01:00

DDR5

Migrate from clkMhz to tCK entry in memspecs

2024-02-23 12:04:22 +01:00

HBM2

Migrate from clkMhz to tCK entry in memspecs

2024-02-23 12:04:22 +01:00

HBM3

Migrate from clkMhz to tCK entry in memspecs

2024-02-23 12:04:22 +01:00

LPDDR4

Migrate from clkMhz to tCK entry in memspecs

2024-02-23 12:04:22 +01:00

LPDDR5

Migrate from clkMhz to tCK entry in memspecs

2024-02-23 12:04:22 +01:00

CMakeLists.txt

Update expected traces for DDR5 and HBM3

2023-08-15 11:28:03 +02:00