Files
DRAMSys/DRAM/dram/core/scheduling/CommandSequenceGenerator.cpp
2014-03-15 18:31:16 +01:00

82 lines
1.9 KiB
C++

/*
* CommandSequenceGenerator.cpp
*
* Created on: Mar 5, 2014
* Author: jonny
*/
#include "CommandSequenceGenerator.h"
#include "common/dramExtension.h"
using namespace std;
namespace controller {
CommandSequence CommandSequenceGenerator::generateCommandSequence(tlm::tlm_generic_payload& transaction)
{
const DramExtension& extension = DramExtension::getExtension(&transaction);
Bank bank = extension.getBank();
Row row = extension.getRow();
CommandSequence result;
if (!controllerState.bankStates.rowBufferIsOpen(bank))
{
return getBankMissCommandSequence(transaction);
}
else if (controllerState.bankStates.getRowInRowBuffer(bank) != row)
{
return getRowMissCommandSequence(transaction);
}
else
{
return getRowHitCommandSequence(transaction);
}
}
CommandSequence CommandSequenceGenerator::generateCommandSequence(
tlm::tlm_generic_payload* transaction)
{
return generateCommandSequence(*transaction);
}
CommandSequence CommandSequenceGenerator::getBankMissCommandSequence(tlm::tlm_generic_payload& transaction)
{
vector<Command> result;
result.push_back(Activate);
result.push_back(getReadWriteCommand(transaction));
return result;
}
CommandSequence CommandSequenceGenerator::getRowMissCommandSequence(tlm::tlm_generic_payload& transaction)
{
vector<Command> result;
result.push_back(Precharge);
result.push_back(Activate);
result.push_back(getReadWriteCommand(transaction));
return result;
}
CommandSequence CommandSequenceGenerator::getRowHitCommandSequence(tlm::tlm_generic_payload& transaction)
{
vector<Command> result;
result.push_back(getReadWriteCommand(transaction));
return result;
}
Command CommandSequenceGenerator::getReadWriteCommand(tlm::tlm_generic_payload& transaction)
{
if (transaction.get_command() == tlm::TLM_READ_COMMAND)
{
//TODO READA
return Read;
}
else
{
return Write;
}
}
} /* namespace controller */