Files
DRAMSys/dram/src/core/configuration/MemSpecLoader.cpp
Janik Schlemminger 339dfbbdbb config xml extended
2014-04-09 12:36:02 +02:00

109 lines
3.7 KiB
C++

/*
* MemSpecLoader.cpp
*
* Created on: Apr 7, 2014
* Author: jonny
*/
#include "MemSpecLoader.h"
#include "TimingConfiguration.h"
using namespace tinyxml2;
using namespace std;
namespace core {
void MemSpecLoader::loadConfiguration(Configuration& config, string memspecUri, string memconfigUri)
{
tinyxml2::XMLDocument doc;
loadXML(memspecUri, doc);
XMLElement* memspec = doc.FirstChildElement("memspec");
config.MemoryId = queryStringParameter(memspec, "memoryId");
config.MemoryType = queryStringParameter(memspec, "memoryType");
if (config.MemoryType == "DDR4")
{
loadDDR4(config, memspec);
}
else if (config.MemoryType == "WIDEIO_SDR")
{
loadWideIO(config, memspec);
}
else
{
reportFatal("ConfigurationLoader", "Unsupported Configuration");
}
loadXML(memconfigUri, doc);
memspec = doc.FirstChildElement("memspec");
loadConfig(config, memspec);
}
void MemSpecLoader::loadConfig(Configuration& config, XMLElement* memspec)
{
//MemConfiguration
XMLElement* configuration = memspec->FirstChildElement("memconfig");
config.BankwiseLogic = queryBoolParameter(configuration, "bankwiseLogic");
config.OpenPagePolicy = queryBoolParameter(configuration, "openPagePolicy");
config.AdaptiveOpenPagePolicy = queryBoolParameter(configuration, "adaptiveOpenPagePolicy");
config.RefreshAwareScheduling = queryBoolParameter(configuration, "refreshAwareScheduling");
config.MaxNrOfTransactions = queryUIntParameter(configuration, "maxNrOfTransactionsInDram");
config.Scheduler = queryStringParameter(configuration, "scheduler");
config.Capsize = queryUIntParameter(configuration, "capsize");
}
void MemSpecLoader::loadDDR4(Configuration& config, XMLElement* memspec)
{
}
void MemSpecLoader::loadWideIO(Configuration& config, XMLElement* memspec)
{
//MemSpecification
XMLElement* architecture = memspec->FirstChildElement("memarchitecturespec");
config.NumberOfBanks = queryUIntParameter(architecture, "nbrOfBanks");
config.NumberOfBankGroups = 1;
config.BurstLength = queryUIntParameter(architecture, "burstLength");
config.nActivate = 2;
config.DataRate = queryUIntParameter(architecture, "dataRate");
config.NumberOfRows = queryUIntParameter(architecture, "nbrOfRows");
//MemTimings
XMLElement* timings = memspec->FirstChildElement("memtimingspec");
double clkMhz = queryDoubleParameter(timings, "clkMhz");
sc_time clk = sc_time(1 / clkMhz, SC_US);
config.Timings.clk = clk;
config.Timings.tRP = clk * queryUIntParameter(timings, "RP");
config.Timings.tRAS = clk * queryUIntParameter(timings, "RAS");
config.Timings.tRC = clk * queryUIntParameter(timings, "RC");
config.Timings.tRRD = clk * queryUIntParameter(timings, "RRD");
config.Timings.tRCD = clk * queryUIntParameter(timings, "RCD");
config.Timings.tNAW = clk * queryUIntParameter(timings, "TAW");
config.Timings.tRL = clk * queryUIntParameter(timings, "RL");
config.Timings.tWL = clk * queryUIntParameter(timings, "WL");
config.Timings.tWR = clk * queryUIntParameter(timings, "WR");
config.Timings.tWTR = clk * queryUIntParameter(timings, "WTR");
config.Timings.tCKESR = clk * queryUIntParameter(timings, "CKESR");
config.Timings.tCKE = clk * queryUIntParameter(timings, "CKE");
config.Timings.tXP = clk * queryUIntParameter(timings, "XP");
config.Timings.tXSR = clk * queryUIntParameter(timings, "XS");
config.Timings.tAL = clk * queryUIntParameter(timings, "AL");
config.Timings.tRFC = clk * queryUIntParameter(timings, "RFC");
config.Timings.tREFI = clk * queryUIntParameter(timings, "REFI");
config.Timings.refreshTimings.clear();
for (unsigned int i = 0; i < config.NumberOfBanks; ++i)
{
config.Timings.refreshTimings.push_back(
RefreshTiming(config.Timings.tRFC, config.Timings.tREFI));
}
}
} /* namespace core */