{
    "memspec": {
        "memarchitecturespec": {
            "burstLength": 16,
            "dataRate": 8,
            "nbrOfBankGroups": 4,
            "nbrOfBanks": 16,
            "nbrOfColumns": 1024,
            "nbrOfRows": 32768,
            "nbrOfRanks": 1,
            "nbrOfDevices": 1,
            "nbrOfChannels": 1,
            "width": 16,
            "per2BankOffset": 8
        },
        "memoryId": "JEDEC_512Mbx16_BG_LPDDR5X-6400",
        "memoryType": "LPDDR5",
        "memtimingspec": {
            "RCD_L": 15,
            "RCD_S": 7,
            "PPD": 2,
            "RPab": 17,
            "RPpb": 15,
            "RAS": 34,
            "RCab": 51,
            "RCpb": 48,
            "FAW": 12,
            "RRD": 3,
            "RL": 17,
            "WCK2CK": 0,
            "WCK2DQO": 1,
            "RBTP": 4,
            "RPRE": 0,
            "RPST": 0,
            "WL": 9,
            "WCK2DQI": 0,
            "WPRE": 0,
            "WPST": 0,
            "WR": 28,
            "WTR_L": 10,
            "WTR_S": 5,
            "CCDMW": 8,
            "REFI": 3124,
            "REFIpb": 390,
            "RFCab": 168,
            "RFCpb": 96,
            "RFMab": 168,
            "RFMpb": 96,
            "RTRS": 1,
            "BL_n_min_16": 2,
            "BL_n_max_16": 2,
            "BL_n_L_16": 2,
            "BL_n_S_16": 2,
            "BL_n_min_32": 4,
            "BL_n_max_32": 4,
            "BL_n_L_32": 4,
            "BL_n_S_32": 4,
            "pbR2act": 6,
            "pbR2pbR": 72,
            "clkMhz": 800
        }
    }
}