{
    "simulation": {
        "addressmapping": "am_ddr5_2x8x2Gbx4_dimm_p1KB_rbc.json",
        "mcconfig": "fr_fcfs.json",
        "memspec": "JEDEC_2x8x2Gbx4_DDR5-3200A.json",
        "simconfig": "example.json",
        "simulationid": "ddr5-example",
        "tracesetup": [
            {
                "clkMhz": 2000,
                "name": "example.stl"
            }
        ]
    }
}