{
    "simulation": {
        "addressmapping": "addressmapping/am_ddr5_2x8x2Gbx4_dimm_p1KB_rbc.json",
        "mcconfig": "mcconfig/fr_fcfs.json",
        "memspec": "memspec/JEDEC_2x8x2Gbx4_DDR5-3200A.json",
        "simconfig": "simconfig/example.json",
        "simulationid": "ddr5-example",
        "tracesetup": [
            {
                "clkMhz": 2000,
                "type": "generator",
                "name": "gen0",
                "numRequests": 2000,
                "rwRatio": 0.85,
                "addressDistribution": "sequential",
                "addressIncrement": 256,
                "maxPendingReadRequests": 8,
                "maxPendingWriteRequests": 8
            },
            {
                "clkMhz": 2000,
                "type": "generator",
                "name": "gen1",
                "numRequests": 2000,
                "rwRatio": 0.85,
                "addressDistribution": "random",
                "seed": 123456,
                "maxPendingReadRequests": 8,
                "maxPendingWriteRequests": 8
            }
        ]
    }
}