{
    "memspec": {
        "memarchitecturespec": {
            "burstLength": 16,
            "dataRate": 4,
            "nbrOfBankGroups": 1,
            "nbrOfBanks": 16,
            "nbrOfColumns": 1024,
            "nbrOfRows": 32768,
            "nbrOfRanks": 1,
            "nbrOfDevices": 1,
            "nbrOfChannels": 1,
            "width": 16,
            "per2BankOffset": 8
        },
        "memoryId": "JEDEC_512Mbx16_16B_LPDDR5X-3200",
        "memoryType": "LPDDR5",
        "memtimingspec": {
            "RCD_L": 8,
            "RCD_S": 4,
            "PPD": 2,
            "RPab": 9,
            "RPpb": 8,
            "RAS": 17,
            "RCab": 26,
            "RCpb": 24,
            "FAW": 6,
            "RRD": 2,
            "RL": 9,
            "WCK2CK": 0,
            "WCK2DQO": 1,
            "RBTP": 1,
            "RPRE": 0,
            "RPST": 0,
            "WL": 5,
            "WCK2DQI": 0,
            "WPRE": 0,
            "WPST": 0,
            "WR": 14,
            "WTR_L": 5,
            "WTR_S": 4,
            "CCDMW": 8,
            "REFI": 1562,
            "REFIpb": 195,
            "RFCab": 84,
            "RFCpb": 48,
            "RFMab": 84,
            "RFMpb": 48,
            "RTRS": 1,
            "BL_n_min_16": 2,
            "BL_n_max_16": 2,
            "BL_n_L_16": 2,
            "BL_n_S_16": 2,
            "BL_n_min_32": 4,
            "BL_n_max_32": 4,
            "BL_n_L_32": 4,
            "BL_n_S_32": 4,
            "pbR2act": 3,
            "pbR2pbR": 36,
            "tCK": 2500
        }
    }
}