{
    "simulation": {
        "addressmapping": {
            "BANKGROUP_BIT": [
                5,
                6
            ],
            "BANK_BIT": [
                7,
                8
            ],
            "BYTE_BIT": [
                0
            ],
            "COLUMN_BIT": [
                1,
                2,
                3,
                4,
                9,
                10,
                11,
                12,
                13,
                14
            ],
            "ROW_BIT": [
                15,
                16,
                17,
                18,
                19,
                20,
                21,
                22,
                23,
                24,
                25,
                26,
                27,
                28,
                29,
                30
            ]
        },
        "mcconfig": {
            "Arbiter": "Simple",
            "CmdMux": "Oldest",
            "MaxActiveTransactions": 128,
            "PagePolicy": "Open",
            "PowerDownPolicy": "NoPowerDown",
            "RefreshManagement": false,
            "RefreshMaxPostponed": 0,
            "RefreshMaxPulledin": 0,
            "RefreshPolicy": "Per2Bank",
            "RequestBufferSize": 8,
            "RespQueue": "Fifo",
            "Scheduler": "FrFcfs",
            "SchedulerBuffer": "Bankwise"
        },
        "memspec": {
            "memarchitecturespec": {
                "burstLength": 16,
                "dataRate": 8,
                "nbrOfBankGroups": 4,
                "nbrOfBanks": 16,
                "nbrOfChannels": 1,
                "nbrOfColumns": 1024,
                "nbrOfDevices": 1,
                "nbrOfRanks": 1,
                "nbrOfRows": 65536,
                "per2BankOffset": 8,
                "width": 16,
                "WCKalwaysOn": false,
                "maxBurstLength": 16
            },
            "memoryId": "JEDEC_1Gbx16_BG_LPDDR5-6400",
            "memoryType": "LPDDR5",
            "memtimingspec": {
                "BL_n_L_16": 4,
                "BL_n_L_32": 8,
                "BL_n_S_16": 2,
                "BL_n_S_32": 2,
                "BL_n_max_16": 4,
                "BL_n_max_32": 8,
                "BL_n_min_16": 2,
                "BL_n_min_32": 6,
                "CCDMW": 16,
                "FAW": 16,
                "PPD": 2,
                "RAS": 34,
                "RBTP": 4,
                "RCD_L": 15,
                "RCD_S": 15,
                "RCab": 51,
                "RCpb": 48,
                "REFI": 3124,
                "REFIpb": 390,
                "RFCab": 224,
                "RFCpb": 112,
                "RL": 17,
                "RPRE": 0,
                "RPST": 0,
                "RPab": 17,
                "RPpb": 15,
                "RRD": 4,
                "RTRS": 1,
                "WCK2CK": 0,
                "WCK2DQI": 0,
                "WCK2DQO": 1,
                "WL": 9,
                "WPRE": 0,
                "WPST": 0,
                "WR": 28,
                "WTR_L": 10,
                "WTR_S": 5,
                "pbR2act": 6,
                "pbR2pbR": 72,
                "tCK": 800e-12
            },
            "mempowerspec": {
                "vdd1": 0.0,
                "idd01": 0.0,
                "idd2n1": 0.0,
                "idd3n1": 0.0,
                "idd4r1": 0.0,
                "idd4w1": 0.0,
                "idd51": 0.0,
                "idd5pb1": 0.0,
                "idd61": 0.0,
                "idd6ds1": 0.0,
                "idd2p1": 0.0,
                "idd3p1": 0.0,
                "vdd2h": 0.0,
                "idd02h": 0.0,
                "idd2n2h": 0.0,
                "idd3n2h": 0.0,
                "idd4r2h": 0.0,
                "idd4w2h": 0.0,
                "idd52h": 0.0,
                "idd5pb2h": 0.0,
                "idd62h": 0.0,
                "idd6ds2h": 0.0,
                "idd2p2h": 0.0,
                "idd3p2h": 0.0,
                "vdd2l": 0.0,
                "idd02l": 0.0,
                "idd2n2l": 0.0,
                "idd3n2l": 0.0,
                "idd4r2l": 0.0,
                "idd4w2l": 0.0,
                "idd52l": 0.0,
                "idd5pb2l": 0.0,
                "idd62l": 0.0,
                "idd6ds2l": 0.0,
                "idd2p2l": 0.0,
                "idd3p2l": 0.0,
                "vddq": 0.0,
                "iBeta_vdd1": 0.0,
                "iBeta_vdd2h": 0.0,
                "iBeta_vdd2l": 0.0
            },
            "bankwisespec": {
                "factRho": 1.0
            },
            "memimpedancespec": {
                "ck_termination": true,
                "ck_R_eq": 1e6,
                "ck_dyn_E": 1e-12,
          
                "ca_termination": true,
                "ca_R_eq": 1e6,
                "ca_dyn_E": 1e-12,
          
                "rdq_termination": true,
                "rdq_R_eq": 1e6,
                "rdq_dyn_E": 1e-12,
                "wdq_termination": true,
                "wdq_R_eq": 1e6,
                "wdq_dyn_E": 1e-12,
          
                "wck_termination": true,
                "wck_R_eq": 1e6,
                "wck_dyn_E": 1e-12,
                "rdqs_termination": true,
                "rdqs_R_eq": 1e6,
                "rdqs_dyn_E": 1e-12,

                "rdbi_termination": true,
                "rdbi_R_eq": 1e6,
                "rdbi_dyn_E": 1e-12,
                "wdbi_termination": true,
                "wdbi_R_eq": 1e6,
                "wdbi_dyn_E": 1e-12
            }
        },
        "simconfig": {
            "AddressOffset": 0,
            "CheckTLM2Protocol": false,
            "DatabaseRecording": true,
            "Debug": false,
            "EnableWindowing": false,
            "PowerAnalysis": false,
            "SimulationName": "lpddr5",
            "SimulationProgressBar": true,
            "StoreMode": "NoStorage",
            "UseMalloc": false,
            "WindowSize": 1000
        },
        "simulationid": "lpddr5-example",
        "tracesetup": [
            {
                "type": "player",
                "clkMhz": 1600,
                "dataLength": 32,
                "name": "traces/trace_lpddr5.stl"
            }
        ]
    }
}