4 Commits

Author	SHA1	Message	Date
marcomoerz	4120e9c35b	Integrate DRAMUtils and new DRAMPower	2025-05-09 16:45:54 +02:00
Derek Christ	0ec6ea79ad	Migrate from clkMhz to tCK entry in memspecs	2024-02-23 12:04:22 +01:00
Lukas Steiner	b086fa985d	Change names of LPDDR5 timings from tRCDRD/tRCDWR to tRCD_L/tRCD_S.	2023-03-30 15:06:17 +02:00
Derek Christ	5d7171e537	Add LPDDR5X configurations and separate tRCD into tRCDRD and tRCDWR	2023-03-29 16:49:15 +02:00