diff --git a/dram/resources/configs/memconfigs/fifo.xml b/dram/resources/configs/memconfigs/fifo.xml
index 094a261e..c37033bb 100644
--- a/dram/resources/configs/memconfigs/fifo.xml
+++ b/dram/resources/configs/memconfigs/fifo.xml
@@ -8,6 +8,7 @@
   <PowerDownTimeout value="100" />
   <!-- Error Modelling -->
   <Chipseed value="42" />
-  <csvfile value="/home/ehses/projects/dram.vp.system/dram/src/error/error_new.csv" />
+  <csvfile value="../src/error/error_new.csv" />
+
   <StorMo value="0" /><!--3 Modes: 0 no storage, 1 store data without errormodel, 2 store data with errormodel-->
 </memconfig>
diff --git a/dram/resources/configs/memconfigs/fifoStrict.xml b/dram/resources/configs/memconfigs/fifoStrict.xml
index 64424430..36f48e64 100644
--- a/dram/resources/configs/memconfigs/fifoStrict.xml
+++ b/dram/resources/configs/memconfigs/fifoStrict.xml
@@ -8,6 +8,6 @@
   <PowerDownTimeout value="100" />
   <!-- Error Modelling -->
   <Chipseed value="42" />
-  <csvfile value="/home/ehses/projects/dram.vp.system/dram/src/error/error_new.csv" />
+  <csvfile value="../src/error/error_new.csv" />
   <StorMo value="0" /><!--3 Modes: 0 no storage, 1 store data without errormodel, 2 store data with errormodel-->
 </memconfig>
diff --git a/dram/resources/configs/memconfigs/fr_fcfs.xml b/dram/resources/configs/memconfigs/fr_fcfs.xml
index 546b3223..b5022068 100644
--- a/dram/resources/configs/memconfigs/fr_fcfs.xml
+++ b/dram/resources/configs/memconfigs/fr_fcfs.xml
@@ -8,7 +8,7 @@
   <PowerDownTimeout value="100" />
   <!-- Error Model: -->
   <Chipseed value="42" />
-  <csvfile value="/home/ehses/projects/dram.vp.system/dram/src/error/error_new.csv" />
+  <csvfile value="../src/error/error_new.csv" />
   <StorMo value="0" /><!--3 Modes: 0 no storage, 1 store data without errormodel, 2 store data with errormodel-->
   <!-- 
   <Buswidth value="128" />
diff --git a/dram/resources/simulations/sim-batch.xml b/dram/resources/simulations/sim-batch.xml
index 5cfb81b9..bf579499 100644
--- a/dram/resources/simulations/sim-batch.xml
+++ b/dram/resources/simulations/sim-batch.xml
@@ -31,13 +31,13 @@
                     <PowerAnalysys value="1" />
         </simconfig>
         <memspecs>
-                <memspec src="/home/jungma/projects/dram.vp.system/dram/resources/configs/memspecs/WideIO.xml"></memspec>
+                <memspec src="../resources/configs/memspecs/WideIO.xml"></memspec>
         </memspecs>
         <addressmappings>
-                <addressmapping src="/home/jungma/projects/dram.vp.system/dram/resources/configs/amconfigs/am_wideio.xml"></addressmapping>
+                <addressmapping src="../resources/configs/amconfigs/am_wideio.xml"></addressmapping>
         </addressmappings>
         <memconfigs>
-           <memconfig src="/home/jungma/projects/dram.vp.system/dram/resources/configs/memconfigs/fifo.xml"/>
+           <memconfig src="../resources/configs/memconfigs/fifo.xml"/>
         </memconfigs>
 
 <tracesetups>