diff --git a/DRAMSys/library/src/controller/scheduler/SchedulerFifo.cpp b/DRAMSys/library/src/controller/scheduler/SchedulerFifo.cpp
index 9f0eb5ae..ce31bc50 100644
--- a/DRAMSys/library/src/controller/scheduler/SchedulerFifo.cpp
+++ b/DRAMSys/library/src/controller/scheduler/SchedulerFifo.cpp
@@ -38,12 +38,20 @@ SchedulerFifo::SchedulerFifo()
 {
     buffer = std::vector<std::queue<tlm_generic_payload *>>
             (Configuration::getInstance().memSpec->NumberOfBanks);
+    maxNumberOfRequests = Configuration::getInstance().MaxNrOfTransactions;
+}
+
+bool SchedulerFifo::hasBufferSpace(tlm_generic_payload *payload)
+{
+    if (buffer[DramExtension::getBank(payload).ID()].size() < maxNumberOfRequests)
+        return true;
+    else
+        return false;
 }
 
 void SchedulerFifo::storeRequest(tlm_generic_payload *payload)
 {
-    unsigned bankID = DramExtension::getBank(payload).ID();
-    buffer[bankID].push(payload);
+    buffer[DramExtension::getBank(payload).ID()].push(payload);
 }
 
 tlm_generic_payload *SchedulerFifo::getNextRequest(BankMachine *bankMachine)
diff --git a/DRAMSys/library/src/controller/scheduler/SchedulerFifo.h b/DRAMSys/library/src/controller/scheduler/SchedulerFifo.h
index eac15127..f2d9f8be 100644
--- a/DRAMSys/library/src/controller/scheduler/SchedulerFifo.h
+++ b/DRAMSys/library/src/controller/scheduler/SchedulerFifo.h
@@ -48,12 +48,14 @@ class SchedulerFifo : public SchedulerIF
 {
 public:
     SchedulerFifo();
-    void storeRequest(tlm_generic_payload *);
-    tlm_generic_payload *getNextRequest(BankMachine *);
-    bool hasRowHit(Bank, Row);
-    bool hasRequest(Bank);
+    virtual bool hasBufferSpace(tlm_generic_payload *) override;
+    virtual void storeRequest(tlm_generic_payload *) override;
+    virtual tlm_generic_payload *getNextRequest(BankMachine *) override;
+    virtual bool hasRowHit(Bank, Row) override;
+    virtual bool hasRequest(Bank) override;
 private:
     std::vector<std::queue<tlm_generic_payload *>> buffer;
+    unsigned maxNumberOfRequests;
 };
 
 #endif // SCHEDULERFIFO_H
diff --git a/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.cpp b/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.cpp
index c9f2df18..eb784508 100644
--- a/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.cpp
+++ b/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.cpp
@@ -38,14 +38,22 @@
 
 SchedulerFrFcfs::SchedulerFrFcfs()
 {
-    buffer = std::vector<std::vector<tlm_generic_payload *>>
+    buffer = std::vector<std::list<tlm_generic_payload *>>
             (Configuration::getInstance().memSpec->NumberOfBanks);
+    maxNumberOfRequests = Configuration::getInstance().MaxNrOfTransactions;
+}
+
+bool SchedulerFrFcfs::hasBufferSpace(tlm_generic_payload *payload)
+{
+    if (buffer[DramExtension::getBank(payload).ID()].size() < maxNumberOfRequests)
+        return true;
+    else
+        return false;
 }
 
 void SchedulerFrFcfs::storeRequest(tlm_generic_payload *payload)
 {
-    unsigned bankID = DramExtension::getBank(payload).ID();
-    buffer[bankID].push_back(payload);
+    buffer[DramExtension::getBank(payload).ID()].push_back(payload);
 }
 
 tlm_generic_payload *SchedulerFrFcfs::getNextRequest(BankMachine *bankMachine)
@@ -57,7 +65,7 @@ tlm_generic_payload *SchedulerFrFcfs::getNextRequest(BankMachine *bankMachine)
         if (currentState == BmState::Precharged)
         {
             tlm_generic_payload *result = buffer[bankID].front();
-            buffer[bankID].erase(buffer[bankID].begin());
+            buffer[bankID].pop_front();
             return result;
         }
         else if (currentState == BmState::Activated)
@@ -75,7 +83,7 @@ tlm_generic_payload *SchedulerFrFcfs::getNextRequest(BankMachine *bankMachine)
             }
             // No row hit found
             tlm_generic_payload *result = buffer[bankID].front();
-            buffer[bankID].erase(buffer[bankID].begin());
+            buffer[bankID].pop_front();
             return result;
         }
         else
diff --git a/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.h b/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.h
index 9946e39f..5bf4f264 100644
--- a/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.h
+++ b/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.h
@@ -37,7 +37,7 @@
 
 #include <tlm.h>
 #include <vector>
-#include <vector>
+#include <list>
 #include "SchedulerIF.h"
 #include "../../common/dramExtensions.h"
 #include "../BankMachine.h"
@@ -48,12 +48,14 @@ class SchedulerFrFcfs : public SchedulerIF
 {
 public:
     SchedulerFrFcfs();
-    void storeRequest(tlm_generic_payload *);
-    tlm_generic_payload *getNextRequest(BankMachine *);
-    bool hasRowHit(Bank, Row);
-    bool hasRequest(Bank);
+    virtual bool hasBufferSpace(tlm_generic_payload *) override;
+    virtual void storeRequest(tlm_generic_payload *) override;
+    virtual tlm_generic_payload *getNextRequest(BankMachine *) override;
+    virtual bool hasRowHit(Bank, Row) override;
+    virtual bool hasRequest(Bank) override;
 private:
-    std::vector<std::vector<tlm_generic_payload *>> buffer;
+    std::vector<std::list<tlm_generic_payload *>> buffer;
+    unsigned maxNumberOfRequests;
 };
 
 #endif // SCHEDULERFRFCFS_H
diff --git a/DRAMSys/library/src/controller/scheduler/SchedulerIF.h b/DRAMSys/library/src/controller/scheduler/SchedulerIF.h
index 8568773b..c882a3b0 100644
--- a/DRAMSys/library/src/controller/scheduler/SchedulerIF.h
+++ b/DRAMSys/library/src/controller/scheduler/SchedulerIF.h
@@ -49,6 +49,7 @@ class SchedulerIF
 {
 public:
     virtual ~SchedulerIF() {}
+    virtual bool hasBufferSpace(tlm_generic_payload *) = 0;
     virtual void storeRequest(tlm_generic_payload *) = 0;
     virtual tlm_generic_payload *getNextRequest(BankMachine *) = 0;
     virtual bool hasRowHit(Bank, Row) = 0;