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This commit is contained in:
Matthias Jung
2017-02-19 17:49:37 +01:00
parent 42887ad0eb
commit e9f29c92ea
10 changed files with 23 additions and 8 deletions
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1
DRAMSys/simulator/resources/configs/simulator/ddr3-single-device.xml
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@@ -9,4 +9,5 @@
<SimulationProgressBar value="1"/> <SimulationProgressBar value="1"/>
<NumberOfMemChannels value="1"/> <NumberOfMemChannels value="1"/>
<NumberOfDevicesOnDIMM value = "8" /> <NumberOfDevicesOnDIMM value = "8" />
<CheckTLM2Protocol value = "0" />
</simconfig> </simconfig>

1
DRAMSys/simulator/resources/configs/simulator/ddr3.xml
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@@ -9,4 +9,5 @@
<SimulationProgressBar value="1"/> <SimulationProgressBar value="1"/>
<NumberOfMemChannels value="1"/> <NumberOfMemChannels value="1"/>
<NumberOfDevicesOnDIMM value = "8" /> <NumberOfDevicesOnDIMM value = "8" />
<CheckTLM2Protocol value = "0" />
</simconfig> </simconfig>

1
DRAMSys/simulator/resources/configs/simulator/wideio.xml
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@@ -9,5 +9,6 @@
<SimulationProgressBar value="1"/> <SimulationProgressBar value="1"/>
<NumberOfMemChannels value="1"/> <NumberOfMemChannels value="1"/>
<NumberOfDevicesOnDIMM value = "1" /> <NumberOfDevicesOnDIMM value = "1" />
<CheckTLM2Protocol value = "0" />
</simconfig> </simconfig>

14
DRAMSys/simulator/resources/configs/simulator/wideio_thermal.xml Normal file
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@@ -0,0 +1,14 @@
<simconfig>
<SimulationName value="wideio" />
<Debug value="0" />
<DatabaseRecording value="1" />
<PowerAnalysis value="1" />
<EnableWindowing value = "1" />
<WindowSize value="1000" />
<ThermalSimulation value="1"/>
<SimulationProgressBar value="1"/>
<NumberOfMemChannels value="1"/>
<NumberOfDevicesOnDIMM value = "1" />
<CheckTLM2Protocol value = "0" />
</simconfig>

2
DRAMSys/simulator/resources/simulations/ddr3-example.xml
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@@ -13,7 +13,7 @@
The following trace setup is only used in standalone mode. The following trace setup is only used in standalone mode.
In library mode e.g. in Platform Architect the trace setup is ignored. In library mode e.g. in Platform Architect the trace setup is ignored.
--> -->
<tracesetup id="fifo_scram"> <tracesetup>
<!-- <!--
This device mimics an image processing application This device mimics an image processing application
running on an FPGA with 200 Mhz. running on an FPGA with 200 Mhz.

2
DRAMSys/simulator/resources/simulations/ddr3-single-device.xml
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@@ -13,7 +13,7 @@
The following trace setup is only used in standalone mode. The following trace setup is only used in standalone mode.
In library mode e.g. in Platform Architect the trace setup is ignored. In library mode e.g. in Platform Architect the trace setup is ignored.
--> -->
<tracesetup id="fifo"> <tracesetup>
<!-- <!--
This device mimics an image processing application This device mimics an image processing application
running on an FPGA with 200 Mhz. running on an FPGA with 200 Mhz.

2
DRAMSys/simulator/resources/simulations/wideio-example.xml
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@@ -13,7 +13,7 @@
The following trace setup is only used in standalone mode. The following trace setup is only used in standalone mode.
In library mode e.g. in Platform Architect the trace setup is ignored. In library mode e.g. in Platform Architect the trace setup is ignored.
--> -->
<tracesetup id="fifo"> <tracesetup>
<!-- <!--
This device mimics an processor running at 1 GHz. This device mimics an processor running at 1 GHz.
--> -->

2
DRAMSys/simulator/src/simulation/TraceSetup.cpp
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@@ -93,8 +93,6 @@ traceSetup::traceSetup(std::string uri,
} }
remainingTransactions = totalTransactions; remainingTransactions = totalTransactions;
NumberOfTracePlayers = devices->size(); NumberOfTracePlayers = devices->size();
cout << "NumberOfTracePlayers: " << NumberOfTracePlayers << endl;
cout << "totalTransactions: " << totalTransactions << endl;
} }

2
DRAMSys/simulator/src/simulation/main.cpp
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@@ -82,7 +82,7 @@ int sc_main(int argc, char **argv)
DRAMSys dramSys("DRAMSys", SimulationXML, resources); DRAMSys dramSys("DRAMSys", SimulationXML, resources);
// Instantiate STL Players: // Instantiate STL Players:
traceSetup setup = traceSetup(SimulationXML, resources, &players); traceSetup(SimulationXML, resources, &players);
// Bind STL Players with DRAMSys: // Bind STL Players with DRAMSys:
for(auto& p : players) for(auto& p : players)

4
README.md
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@@ -498,7 +498,7 @@ The XML code below shows a typic configuration:
The following trace setup is only used in standalone mode. The following trace setup is only used in standalone mode.
In library mode e.g. in Platform Architect the trace setup is ignored. In library mode e.g. in Platform Architect the trace setup is ignored.
--> -->
<tracesetup id="fifo_scram"> <tracesetup>
<!-- <!--
Specify here a trace file for each of the trace players. Trace Specify here a trace file for each of the trace players. Trace
players without a file will not generate transactions. players without a file will not generate transactions.
@@ -824,7 +824,7 @@ The DRAMSys' main configuration file is presented below.
The following trace setup is only used in standalone mode. The following trace setup is only used in standalone mode.
In library mode e.g. in Platform Architect the trace setup is ignored. In library mode e.g. in Platform Architect the trace setup is ignored.
--> -->
<tracesetup id="fifo_scram"> <tracesetup>
<!-- <!--
This device mimics an image processing application This device mimics an image processing application
running on an FPGA with 200 Mhz. running on an FPGA with 200 Mhz.