diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecDDR3.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecDDR3.cpp
index 30e04c29..02f83638 100644
--- a/DRAMSys/library/src/configuration/memspec/MemSpecDDR3.cpp
+++ b/DRAMSys/library/src/configuration/memspec/MemSpecDDR3.cpp
@@ -55,13 +55,8 @@ sc_time MemSpecDDR3::getExecutionTime(Command command, const tlm_generic_payload
         return tRCD;
     else if (command == Command::RD || command == Command::RDA)
         return tRL + getReadAccessTime();
-//    else if (command == Command::RDA)
-//        // TODO: this time is wrong (controller internally waits for tRAS)
-//        return tRTP + tRP;
     else if (command == Command::WR || command == Command::WRA)
         return tWL + getWriteAccessTime();
-//    else if (command == Command::WRA)
-//        return tWL + getWriteAccessTime() + tWR + tRP;
     else if (command == Command::REFA)
         return tRFC;
     else if (command == Command::REFB)
diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecDDR4.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecDDR4.cpp
index ca0deeee..0fd8bfb9 100644
--- a/DRAMSys/library/src/configuration/memspec/MemSpecDDR4.cpp
+++ b/DRAMSys/library/src/configuration/memspec/MemSpecDDR4.cpp
@@ -53,15 +53,10 @@ sc_time MemSpecDDR4::getExecutionTime(Command command, const tlm_generic_payload
         return tRP;
     else if (command == Command::ACT)
         return tRCD;
-    else if (command == Command::RD)
+    else if (command == Command::RD || command == Command::RDA)
         return tRL + getReadAccessTime();
-    else if (command == Command::RDA)
-        // this time is wrong (controller internally waits for tRAS)
-        return tRTP + tRP;
-    else if (command == Command::WR)
+    else if (command == Command::WR || command == Command::WRA)
         return tWL + getWriteAccessTime();
-    else if (command == Command::WRA)
-        return tWL + getWriteAccessTime() + tWR + tRP;
     else if (command == Command::REFA)
         return tRFC;
     else if (command == Command::REFB)
diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp
index 50afd825..106d3c13 100644
--- a/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp
+++ b/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp
@@ -70,12 +70,8 @@ sc_time MemSpecLPDDR4::getExecutionTime(Command command, const tlm_generic_paylo
         return tRCD + 3 * clk;
     else if (command == Command::RD || command == Command::RDA)
         return tRL + tDQSCK + getReadAccessTime() + 3 * clk;
-//    else if (command == Command::RDA)
-//        return getReadAccessTime() - 5 * clk + tRTP + tRPpb;
     else if (command == Command::WR || command == Command::WRA)
         return tWL + tDQSS + tDQS2DQ + getWriteAccessTime() + 3 * clk;
-//    else if (command == Command::WRA)
-//        return tWL + getWriteAccessTime() + 4 * clk + tWR + tRPpb;
     else if (command == Command::REFA)
         return tRFCab + clk;
     else if (command == Command::REFB)
diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecWideIO.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecWideIO.cpp
index 5b4c5316..af3af2b4 100644
--- a/DRAMSys/library/src/configuration/memspec/MemSpecWideIO.cpp
+++ b/DRAMSys/library/src/configuration/memspec/MemSpecWideIO.cpp
@@ -55,13 +55,8 @@ sc_time MemSpecWideIO::getExecutionTime(Command command, const tlm_generic_paylo
         return tRCD;
     else if (command == Command::RD || command == Command::RDA)
         return tRL + tAC + getReadAccessTime();
-//    else if (command == Command::RDA)
-//        // this time is wrong (controller internally waits for tRAS)
-//        return tRTP + tRP;
     else if (command == Command::WR || command == Command::WRA)
         return tWL + getWriteAccessTime();
-//    else if (command == Command::WRA)
-//        return tWL + getWriteAccessTime() + tWR + tRP;
     else if (command == Command::REFA)
         return tRFC;
     else
diff --git a/DRAMSys/library/src/controller/checker/CheckerDDR3.cpp b/DRAMSys/library/src/controller/checker/CheckerDDR3.cpp
index 14b4caf8..74f80b04 100644
--- a/DRAMSys/library/src/controller/checker/CheckerDDR3.cpp
+++ b/DRAMSys/library/src/controller/checker/CheckerDDR3.cpp
@@ -48,6 +48,8 @@ CheckerDDR3::CheckerDDR3()
     lastScheduledByCommand = std::vector<sc_time>(numberOfCommands());
 
     lastActivates = std::vector<std::queue<sc_time>>(memSpec->NumberOfRanks);
+
+    burstClocks = (memSpec->BurstLength / memSpec->DataRate) * memSpec->clk;
 }
 
 sc_time CheckerDDR3::delayToSatisfyConstraints(Command command, Rank rank, BankGroup, Bank bank) const
@@ -64,7 +66,7 @@ sc_time CheckerDDR3::delayToSatisfyConstraints(Command command, Rank rank, BankG
         lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank.ID()];
         if (lastCommandStart != SC_ZERO_TIME)
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + memSpec->BurstLength / 2 * memSpec->clk + memSpec->tWR + memSpec->tRP);
+                    + memSpec->tWL + burstClocks + memSpec->tWR + memSpec->tRP);
 
         lastCommandStart = lastScheduledByCommandAndBank[Command::PRE][bank.ID()];
         if (lastCommandStart != SC_ZERO_TIME)
@@ -109,12 +111,20 @@ sc_time CheckerDDR3::delayToSatisfyConstraints(Command command, Rank rank, BankG
         lastCommandStart = lastScheduledByCommand[Command::WR];
         if (lastCommandStart != SC_ZERO_TIME)
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + memSpec->BurstLength / 2 * memSpec->clk + memSpec->tWTR);
+                    + memSpec->tWL + burstClocks + memSpec->tWTR);
+
+        if (command == Command::RDA)
+        {
+            lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()];
+            if (lastCommandStart != SC_ZERO_TIME)
+                earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
+                        + memSpec->tWL + burstClocks + memSpec->tWR - memSpec->tRTP);
+        }
 
         lastCommandStart = lastScheduledByCommand[Command::WRA];
         if (lastCommandStart != SC_ZERO_TIME)
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + memSpec->BurstLength / 2 * memSpec->clk + memSpec->tWTR);
+                    + memSpec->tWL + burstClocks + memSpec->tWTR);
     }
     else if (command == Command::WR || command == Command::WRA)
     {
@@ -124,12 +134,12 @@ sc_time CheckerDDR3::delayToSatisfyConstraints(Command command, Rank rank, BankG
         lastCommandStart = lastScheduledByCommand[Command::RD];
         if (lastCommandStart != SC_ZERO_TIME)
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tRL + memSpec->BurstLength / 2 * memSpec->clk + 2 * memSpec->clk - memSpec->tWL);
+                    + memSpec->tRL + burstClocks + 2 * memSpec->clk - memSpec->tWL);
 
         lastCommandStart = lastScheduledByCommand[Command::RDA];
         if (lastCommandStart != SC_ZERO_TIME)
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tRL + memSpec->BurstLength / 2 * memSpec->clk + 2 * memSpec->clk - memSpec->tWL);
+                    + memSpec->tRL + burstClocks + 2 * memSpec->clk - memSpec->tWL);
 
         lastCommandStart = lastScheduledByCommand[Command::WR];
         if (lastCommandStart != SC_ZERO_TIME)
@@ -151,7 +161,7 @@ sc_time CheckerDDR3::delayToSatisfyConstraints(Command command, Rank rank, BankG
         lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()];
         if (lastCommandStart != SC_ZERO_TIME)
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + memSpec->BurstLength / 2 * memSpec->clk + memSpec->tWR);
+                    + memSpec->tWL + burstClocks + memSpec->tWR);
     }
     else if (command == Command::PREA)
     {
@@ -169,12 +179,12 @@ sc_time CheckerDDR3::delayToSatisfyConstraints(Command command, Rank rank, BankG
         lastCommandStart = lastScheduledByCommandAndRank[Command::WR][rank.ID()];
         if (lastCommandStart != SC_ZERO_TIME)
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + memSpec->BurstLength / 2 * memSpec->clk + memSpec->tWR);
+                    + memSpec->tWL + burstClocks + memSpec->tWR);
 
         lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()];
         if (lastCommandStart != SC_ZERO_TIME)
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + memSpec->BurstLength / 2 * memSpec->clk + memSpec->tWR);
+                    + memSpec->tWL + burstClocks + memSpec->tWR);
     }
     else if (command == Command::REFA)
     {
@@ -189,7 +199,7 @@ sc_time CheckerDDR3::delayToSatisfyConstraints(Command command, Rank rank, BankG
         lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()];
         if (lastCommandStart != SC_ZERO_TIME)
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + memSpec->BurstLength / 2 * memSpec->clk + memSpec->tWR + memSpec->tRP);
+                    + memSpec->tWL + burstClocks + memSpec->tWR + memSpec->tRP);
 
         lastCommandStart = lastScheduledByCommandAndRank[Command::PRE][rank.ID()];
         if (lastCommandStart != SC_ZERO_TIME)
diff --git a/DRAMSys/library/src/controller/checker/CheckerDDR3.h b/DRAMSys/library/src/controller/checker/CheckerDDR3.h
index 12697b3d..5ee8144b 100644
--- a/DRAMSys/library/src/controller/checker/CheckerDDR3.h
+++ b/DRAMSys/library/src/controller/checker/CheckerDDR3.h
@@ -58,6 +58,8 @@ private:
 
     // Four activate window
     std::vector<std::queue<sc_time>> lastActivates;
+
+    sc_time burstClocks;
 };
 
 #endif // CHECKERDDR3_H
diff --git a/DRAMSys/library/src/controller/checker/CheckerDDR4.cpp b/DRAMSys/library/src/controller/checker/CheckerDDR4.cpp
index ba999d03..e0bab316 100644
--- a/DRAMSys/library/src/controller/checker/CheckerDDR4.cpp
+++ b/DRAMSys/library/src/controller/checker/CheckerDDR4.cpp
@@ -51,7 +51,7 @@ CheckerDDR4::CheckerDDR4()
 
     lastActivates = std::vector<std::queue<sc_time>>(memSpec->NumberOfRanks);
 
-    burstClocks = (memSpec->BurstLength / 2) * memSpec->clk;
+    burstClocks = (memSpec->BurstLength / memSpec->DataRate) * memSpec->clk;
 }
 
 sc_time CheckerDDR4::delayToSatisfyConstraints(Command command, Rank rank, BankGroup bankgroup, Bank bank) const
@@ -123,6 +123,14 @@ sc_time CheckerDDR4::delayToSatisfyConstraints(Command command, Rank rank, BankG
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL
                     + burstClocks + memSpec->tWTR_L);
 
+        if (command == Command::RDA)
+        {
+            lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()];
+            if (lastCommandStart != SC_ZERO_TIME)
+                earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
+                        + memSpec->tWL + burstClocks + memSpec->tWR - memSpec->tRTP);
+        }
+
         lastCommandStart = lastScheduledByCommand[Command::WR];
         if (lastCommandStart != SC_ZERO_TIME)
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL
diff --git a/DRAMSys/library/src/controller/checker/CheckerGDDR5.cpp b/DRAMSys/library/src/controller/checker/CheckerGDDR5.cpp
index 5f8089fe..25107115 100644
--- a/DRAMSys/library/src/controller/checker/CheckerGDDR5.cpp
+++ b/DRAMSys/library/src/controller/checker/CheckerGDDR5.cpp
@@ -111,7 +111,7 @@ sc_time CheckerGDDR5::delayToSatisfyConstraints(Command command, Rank rank, Bank
 
         earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnBus + memSpec->clk);
     }
-    else if (command == Command::RD)
+    else if (command == Command::RD || command == Command::RDA)
     {
         lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank.ID()];
         earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDRD);
@@ -137,53 +137,13 @@ sc_time CheckerGDDR5::delayToSatisfyConstraints(Command command, Rank rank, Bank
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
                     + memSpec->tWL + burstClocks + memSpec->tWTRL);
 
-        lastCommandStart = lastScheduledByCommand[Command::WR];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + burstClocks + memSpec->tWTRS);
-
-        lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WRA][bankgroup.ID()];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + burstClocks + memSpec->tWTRL);
-
-        lastCommandStart = lastScheduledByCommand[Command::WRA];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + burstClocks + memSpec->tWTRS);
-
-        earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnBus + memSpec->clk);
-    }
-    else if (command == Command::RDA)
-    {
-        lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank.ID()];
-        earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDRD);
-
-        lastCommandStart = lastScheduledByCommandAndBankGroup[Command::RD][bankgroup.ID()];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDL);
-
-        lastCommandStart = lastScheduledByCommand[Command::RD];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDS);
-
-        lastCommandStart = lastScheduledByCommandAndBankGroup[Command::RDA][bankgroup.ID()];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDL);
-
-        lastCommandStart = lastScheduledByCommand[Command::RDA];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDS);
-
-        lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + burstClocks + std::max(memSpec->tWR - memSpec->tRTP, memSpec->tWTRL));
-
-        lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WR][bankgroup.ID()];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + burstClocks + memSpec->tWTRL);
+        if (command == Command::RDA)
+        {
+            lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()];
+            if (lastCommandStart != SC_ZERO_TIME)
+                earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
+                        + memSpec->tWL + burstClocks + memSpec->tWR - memSpec->tRTP);
+        }
 
         lastCommandStart = lastScheduledByCommand[Command::WR];
         if (lastCommandStart != SC_ZERO_TIME)
diff --git a/DRAMSys/library/src/controller/checker/CheckerGDDR5X.cpp b/DRAMSys/library/src/controller/checker/CheckerGDDR5X.cpp
index fbc3cbaa..c773e8ac 100644
--- a/DRAMSys/library/src/controller/checker/CheckerGDDR5X.cpp
+++ b/DRAMSys/library/src/controller/checker/CheckerGDDR5X.cpp
@@ -111,7 +111,7 @@ sc_time CheckerGDDR5X::delayToSatisfyConstraints(Command command, Rank rank, Ban
 
         earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnBus + memSpec->clk);
     }
-    else if (command == Command::RD)
+    else if (command == Command::RD || command == Command::RDA)
     {
         lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank.ID()];
         earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDRD);
@@ -137,53 +137,13 @@ sc_time CheckerGDDR5X::delayToSatisfyConstraints(Command command, Rank rank, Ban
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
                     + memSpec->tWL + burstClocks + memSpec->tWTRL);
 
-        lastCommandStart = lastScheduledByCommand[Command::WR];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + burstClocks + memSpec->tWTRS);
-
-        lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WRA][bankgroup.ID()];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + burstClocks + memSpec->tWTRL);
-
-        lastCommandStart = lastScheduledByCommand[Command::WRA];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + burstClocks + memSpec->tWTRS);
-
-        earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnBus + memSpec->clk);
-    }
-    else if (command == Command::RDA)
-    {
-        lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank.ID()];
-        earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDRD);
-
-        lastCommandStart = lastScheduledByCommandAndBankGroup[Command::RD][bankgroup.ID()];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDL);
-
-        lastCommandStart = lastScheduledByCommand[Command::RD];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDS);
-
-        lastCommandStart = lastScheduledByCommandAndBankGroup[Command::RDA][bankgroup.ID()];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDL);
-
-        lastCommandStart = lastScheduledByCommand[Command::RDA];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDS);
-
-        lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + burstClocks + std::max(memSpec->tWR - memSpec->tRTP, memSpec->tWTRL));
-
-        lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WR][bankgroup.ID()];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + burstClocks + memSpec->tWTRL);
+        if (command == Command::RDA)
+        {
+            lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()];
+            if (lastCommandStart != SC_ZERO_TIME)
+                earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
+                        + memSpec->tWL + burstClocks + memSpec->tWR - memSpec->tRTP);
+        }
 
         lastCommandStart = lastScheduledByCommand[Command::WR];
         if (lastCommandStart != SC_ZERO_TIME)
diff --git a/DRAMSys/library/src/controller/checker/CheckerGDDR6.cpp b/DRAMSys/library/src/controller/checker/CheckerGDDR6.cpp
index f5aebd85..d37209ad 100644
--- a/DRAMSys/library/src/controller/checker/CheckerGDDR6.cpp
+++ b/DRAMSys/library/src/controller/checker/CheckerGDDR6.cpp
@@ -107,7 +107,7 @@ sc_time CheckerGDDR6::delayToSatisfyConstraints(Command command, Rank rank, Bank
 
         earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnBus + memSpec->clk);
     }
-    else if (command == Command::RD)
+    else if (command == Command::RD || command == Command::RDA)
     {
         lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank.ID()];
         earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDRD);
@@ -133,53 +133,13 @@ sc_time CheckerGDDR6::delayToSatisfyConstraints(Command command, Rank rank, Bank
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
                     + memSpec->tWL + burstClocks + memSpec->tWTRL);
 
-        lastCommandStart = lastScheduledByCommand[Command::WR];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + burstClocks + memSpec->tWTRS);
-
-        lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WRA][bankgroup.ID()];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + burstClocks + memSpec->tWTRL);
-
-        lastCommandStart = lastScheduledByCommand[Command::WRA];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + burstClocks + memSpec->tWTRS);
-
-        earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnBus + memSpec->clk);
-    }
-    else if (command == Command::RDA)
-    {
-        lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank.ID()];
-        earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDRD);
-
-        lastCommandStart = lastScheduledByCommandAndBankGroup[Command::RD][bankgroup.ID()];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDL);
-
-        lastCommandStart = lastScheduledByCommand[Command::RD];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDS);
-
-        lastCommandStart = lastScheduledByCommandAndBankGroup[Command::RDA][bankgroup.ID()];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDL);
-
-        lastCommandStart = lastScheduledByCommand[Command::RDA];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDS);
-
-        lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + burstClocks + std::max(memSpec->tWR - memSpec->tRTP, memSpec->tWTRL));
-
-        lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WR][bankgroup.ID()];
-        if (lastCommandStart != SC_ZERO_TIME)
-            earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
-                    + memSpec->tWL + burstClocks + memSpec->tWTRL);
+        if (command == Command::RDA)
+        {
+            lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()];
+            if (lastCommandStart != SC_ZERO_TIME)
+                earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
+                        + memSpec->tWL + burstClocks + memSpec->tWR - memSpec->tRTP);
+        }
 
         lastCommandStart = lastScheduledByCommand[Command::WR];
         if (lastCommandStart != SC_ZERO_TIME)
diff --git a/DRAMSys/library/src/controller/checker/CheckerHBM2.cpp b/DRAMSys/library/src/controller/checker/CheckerHBM2.cpp
index 2a960058..d198e241 100644
--- a/DRAMSys/library/src/controller/checker/CheckerHBM2.cpp
+++ b/DRAMSys/library/src/controller/checker/CheckerHBM2.cpp
@@ -135,6 +135,14 @@ sc_time CheckerHBM2::delayToSatisfyConstraints(Command command, Rank rank, BankG
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
                     + memSpec->tWL + burstClocks + memSpec->tWTRL);
 
+        if (command == Command::RDA)
+        {
+            lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()];
+            if (lastCommandStart != SC_ZERO_TIME)
+                earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
+                        + memSpec->tWL + burstClocks + memSpec->tWR - memSpec->tRTP);
+        }
+
         lastCommandStart = lastScheduledByCommand[Command::WR];
         if (lastCommandStart != SC_ZERO_TIME)
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
diff --git a/DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp b/DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp
index e8174a65..661a3129 100644
--- a/DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp
+++ b/DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp
@@ -114,6 +114,14 @@ sc_time CheckerLPDDR4::delayToSatisfyConstraints(Command command, Rank rank, Ban
         if (lastCommandStart != SC_ZERO_TIME)
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL + memSpec->clk + memSpec->tCCD + memSpec->tWTR);
 
+        if (command == Command::RDA)
+        {
+            lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()];
+            if (lastCommandStart != SC_ZERO_TIME)
+                earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
+                        + memSpec->tWL + memSpec->clk + memSpec->tCCD + memSpec->tWR - memSpec->tRTP);
+        }
+
         lastCommandStart = lastScheduledByCommand[Command::WRA];
         if (lastCommandStart != SC_ZERO_TIME)
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL + memSpec->clk + memSpec->tCCD + memSpec->tWTR);
diff --git a/DRAMSys/library/src/controller/checker/CheckerWideIO.cpp b/DRAMSys/library/src/controller/checker/CheckerWideIO.cpp
index c0ac78a7..9b3f4aa8 100644
--- a/DRAMSys/library/src/controller/checker/CheckerWideIO.cpp
+++ b/DRAMSys/library/src/controller/checker/CheckerWideIO.cpp
@@ -109,6 +109,14 @@ sc_time CheckerWideIO::delayToSatisfyConstraints(Command command, Rank rank, Ban
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
                     + memSpec->tWL + burstClocks - memSpec->clk + memSpec->tWTR);
 
+        if (command == Command::RDA)
+        {
+            lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()];
+            if (lastCommandStart != SC_ZERO_TIME)
+                earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
+                        + memSpec->tWL + memSpec->clk + memSpec->tWR);
+        }
+
         lastCommandStart = lastScheduledByCommand[Command::WRA];
         if (lastCommandStart != SC_ZERO_TIME)
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
diff --git a/DRAMSys/library/src/controller/checker/CheckerWideIO2.cpp b/DRAMSys/library/src/controller/checker/CheckerWideIO2.cpp
index 4a99d98a..f91aabda 100644
--- a/DRAMSys/library/src/controller/checker/CheckerWideIO2.cpp
+++ b/DRAMSys/library/src/controller/checker/CheckerWideIO2.cpp
@@ -116,6 +116,14 @@ sc_time CheckerWideIO2::delayToSatisfyConstraints(Command command, Rank rank, Ba
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
                     + memSpec->tWL + memSpec->clk + memSpec->tCCD + memSpec->tWTR);
 
+        if (command == Command::RDA)
+        {
+            lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()];
+            if (lastCommandStart != SC_ZERO_TIME)
+                earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart
+                        + memSpec->tWL + memSpec->clk + memSpec->tCCD + memSpec->tWR - memSpec->tRTP);
+        }
+
         lastCommandStart = lastScheduledByCommand[Command::WRA];
         if (lastCommandStart != SC_ZERO_TIME)
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart