From 76ebfb2dd830013594462de139c9b5ce6e27d79b Mon Sep 17 00:00:00 2001 From: robert Date: Thu, 10 Apr 2014 00:04:38 +0200 Subject: [PATCH 1/4] added par_bs --- dram/.settings/language.settings.xml | 2 +- .../configs/memconfigs/memconfig.xml | 4 +- dram/resources/scripts/metrics.py | 4 +- dram/src/common/dramExtension.cpp | 7 ++ dram/src/common/dramExtension.h | 1 + dram/src/scheduler/Fifo.cpp | 3 +- dram/src/scheduler/Fr_Fcfs.cpp | 39 +++++- dram/src/scheduler/Fr_Fcfs.h | 12 +- dram/src/scheduler/PARBS.cpp | 113 ++++++++++++++++++ dram/src/scheduler/PARBS.h | 38 ++++++ dram/src/scheduler/ThreadLoad.cpp | 71 +++++++++++ dram/src/scheduler/ThreadLoad.h | 44 +++++++ dram/src/simulation/Controller.h | 20 +++- dram/src/simulation/main.cpp | 52 -------- 14 files changed, 338 insertions(+), 72 deletions(-) create mode 100644 dram/src/scheduler/PARBS.cpp create mode 100644 dram/src/scheduler/PARBS.h create mode 100644 dram/src/scheduler/ThreadLoad.cpp create mode 100644 dram/src/scheduler/ThreadLoad.h delete mode 100644 dram/src/simulation/main.cpp diff --git a/dram/.settings/language.settings.xml b/dram/.settings/language.settings.xml index 127cd8ac..278289a3 100644 --- a/dram/.settings/language.settings.xml +++ b/dram/.settings/language.settings.xml @@ -4,7 +4,7 @@ - + diff --git a/dram/resources/configs/memconfigs/memconfig.xml b/dram/resources/configs/memconfigs/memconfig.xml index ba84ec9e..0e118b41 100644 --- a/dram/resources/configs/memconfigs/memconfig.xml +++ b/dram/resources/configs/memconfigs/memconfig.xml @@ -3,9 +3,9 @@ - + - + diff --git a/dram/resources/scripts/metrics.py b/dram/resources/scripts/metrics.py index f1081033..f771a292 100644 --- a/dram/resources/scripts/metrics.py +++ b/dram/resources/scripts/metrics.py @@ -35,7 +35,7 @@ def getTraceLength(connection): @metric def average_response_latency_in_ns(connection): cursor = connection.cursor() - cursor.execute("""SELECT avg(ranges.end-ranges.begin)/1000 FROM transactions INNER JOIN ranges + cursor.execute("""SELECT avg(transactions.DataStrobeEnd-ranges.begin)/1000 FROM transactions INNER JOIN ranges ON transactions.range = ranges.ID where TThread != 0""") result = cursor.fetchone() @@ -44,7 +44,7 @@ def average_response_latency_in_ns(connection): @threadMetric def average_response_latency_in_ns(connection, thread): cursor = connection.cursor() - query = """SELECT avg(ranges.end-ranges.begin)/1000 FROM transactions INNER JOIN ranges + query = """SELECT avg(transactions.DataStrobeEnd-ranges.begin)/1000 FROM transactions INNER JOIN ranges ON transactions.range = ranges.ID where TThread = :Thread """ cursor.execute(query, {"Thread": thread}) diff --git a/dram/src/common/dramExtension.cpp b/dram/src/common/dramExtension.cpp index 591ec8ab..3697c95f 100644 --- a/dram/src/common/dramExtension.cpp +++ b/dram/src/common/dramExtension.cpp @@ -29,6 +29,12 @@ bool operator !=(const Thread& lhs, const Thread& rhs) return !(lhs == rhs); } +bool operator <(const Thread& lhs, const Thread& rhs) +{ + return lhs.ID() < rhs.ID(); +} + + bool operator ==(const Channel& lhs, const Channel& rhs) { return lhs.ID() == rhs.ID(); @@ -88,3 +94,4 @@ bool operator !=(const Column& lhs, const Column& rhs) { return !(lhs == rhs); } + diff --git a/dram/src/common/dramExtension.h b/dram/src/common/dramExtension.h index 9bbf4b04..a8556607 100644 --- a/dram/src/common/dramExtension.h +++ b/dram/src/common/dramExtension.h @@ -78,6 +78,7 @@ private: bool operator==(const Thread &lhs, const Thread &rhs); bool operator!=(const Thread &lhs, const Thread &rhs); +bool operator<(const Thread &lhs, const Thread &rhs); bool operator==(const Channel &lhs, const Channel &rhs); bool operator!=(const Channel &lhs, const Channel &rhs); diff --git a/dram/src/scheduler/Fifo.cpp b/dram/src/scheduler/Fifo.cpp index 26c142f3..b89648f6 100644 --- a/dram/src/scheduler/Fifo.cpp +++ b/dram/src/scheduler/Fifo.cpp @@ -29,7 +29,8 @@ gp* Fifo::getTransactionForBank(Bank bank) void Fifo::popTransactionForBank(Bank bank, gp* payload) { - sc_assert(hasTransactionForBank(bank)); + sc_assert(DramExtension::getExtension(payload).getBank() == bank); + buffer[bank].pop_front(); } diff --git a/dram/src/scheduler/Fr_Fcfs.cpp b/dram/src/scheduler/Fr_Fcfs.cpp index 4bdfd740..e59bef5a 100644 --- a/dram/src/scheduler/Fr_Fcfs.cpp +++ b/dram/src/scheduler/Fr_Fcfs.cpp @@ -8,8 +8,8 @@ using namespace core; namespace scheduler { -FR_FCFS::FR_FCFS(core::ControllerCore& controller, bool refreshAware, bool adaptiveOpenPage) : - controllerBankstates(controller.state.bankStates), refreshAware(refreshAware), adaptiveOpenPage( +FR_FCFS::FR_FCFS(const core::BankStates& bankstates, bool useExternalStates, bool adaptiveOpenPage) : + externalBankstates(bankstates), useExternalStates(useExternalStates), adaptiveOpenPage( adaptiveOpenPage) { } @@ -23,16 +23,34 @@ bool FR_FCFS::hasTransactionForBank(Bank bank) return !buffer[bank].empty(); } + +bool FR_FCFS::isEmpty() +{ + for(unsigned int i = 0; i < Configuration::getInstance().NumberOfBanks;++i) + { + if(!buffer[Bank(i)].empty()) + return false; + } + return true; +} + void FR_FCFS::schedule(gp* payload) { buffer[DramExtension::getExtension(payload).getBank()].emplace_back(payload); } + +void FR_FCFS::schedule(std::vector payloads) +{ + for(gp* payload: payloads) + schedule(payload); +} + gp* FR_FCFS::getTransactionForBank(Bank bank) { sc_assert(hasTransactionForBank(bank)); - Row openRowOnBank = (refreshAware) ? controllerBankstates.getRowInRowBuffer(bank) : internalBankstates.getRowInRowBuffer(bank); + Row openRowOnBank = (useExternalStates) ? externalBankstates.getRowInRowBuffer(bank) : internalBankstates.getRowInRowBuffer(bank); auto rowHits = findRowHits(bank, openRowOnBank); gp* result = rowHits.empty() ? buffer[bank].front() : rowHits.front(); @@ -65,6 +83,15 @@ gp* FR_FCFS::getTransactionForBank(Bank bank) } } +gp* FR_FCFS::popOldest(Bank bank) +{ + assert(hasTransactionForBank(bank)); + + gp* result = buffer[bank].front(); + buffer[bank].pop_front(); + return result; +} + std::vector FR_FCFS::findRowHits(Bank bank, Row row) { vector found; @@ -78,11 +105,11 @@ std::vector FR_FCFS::findRowHits(Bank bank, Row row) void FR_FCFS::popTransactionForBank(Bank bank, gp* payload) { - sc_assert( - hasTransactionForBank(bank) && bank == DramExtension::getExtension(payload).getBank()); + sc_assert(DramExtension::getExtension(payload).getBank() == bank); + buffer[bank].remove(payload); - if (!refreshAware) + if (!useExternalStates) { internalBankstates.openRowInRowBuffer(bank, DramExtension::getExtension(payload).getRow()); } diff --git a/dram/src/scheduler/Fr_Fcfs.h b/dram/src/scheduler/Fr_Fcfs.h index f8473ee1..8e166b51 100644 --- a/dram/src/scheduler/Fr_Fcfs.h +++ b/dram/src/scheduler/Fr_Fcfs.h @@ -5,13 +5,14 @@ #include "../core/ControllerCore.h" #include #include +#include namespace scheduler { class FR_FCFS : public Scheduler { public: - FR_FCFS(core::ControllerCore& controller,bool refreshAware, bool adaptiveOpenPage); + FR_FCFS(const core::BankStates& bankstates, bool refreshAware, bool adaptiveOpenPage); virtual ~FR_FCFS(); virtual bool hasTransactionForBank(Bank bank) override; @@ -19,12 +20,17 @@ public: virtual gp* getTransactionForBank(Bank bank) override; virtual void popTransactionForBank(Bank bank, gp* payload) override; + //used by PAR_BS + void schedule (std::vector payloads); + gp* popOldest(Bank bank); + bool isEmpty(); + private: std::vector findRowHits(Bank bank, Row row); std::map> buffer; - const core::BankStates& controllerBankstates; + const core::BankStates& externalBankstates; core::BankStates internalBankstates; - bool refreshAware; + bool useExternalStates; bool adaptiveOpenPage; }; diff --git a/dram/src/scheduler/PARBS.cpp b/dram/src/scheduler/PARBS.cpp new file mode 100644 index 00000000..7e357870 --- /dev/null +++ b/dram/src/scheduler/PARBS.cpp @@ -0,0 +1,113 @@ +/* + * PARBS.cpp + * + * Created on: Apr 9, 2014 + * Author: robert + */ + +#include "PARBS.h" +#include "../core/configuration/Configuration.h" +#include "../common/dramExtension.h" +#include "map" +#include "ThreadLoad.h" +#include + +namespace scheduler { + +using namespace std; +using namespace core; + +PAR_BS::PAR_BS(const core::BankStates& bankstates, bool useExternalBankstates, unsigned int capsize) : + externalBankstates(bankstates), useExternalBankstates(useExternalBankstates), capsize(capsize) +{ + if (useExternalBankstates) + { + batch = new FR_FCFS(externalBankstates, true, false); + buffer = new FR_FCFS(externalBankstates, true, false); + } + else + { + batch = new FR_FCFS(internalBankstates, true, false); + buffer = new FR_FCFS(internalBankstates, true, false); + } +} + +PAR_BS::~PAR_BS() +{ + +} + +bool PAR_BS::hasTransactionForBank(Bank bank) +{ + return batch->hasTransactionForBank(bank) || buffer->hasTransactionForBank(bank); +} + +void PAR_BS::schedule(gp* payload) +{ + buffer->schedule(payload); +} + +gp* PAR_BS::getTransactionForBank(Bank bank) +{ + assert(hasTransactionForBank(bank)); + + if (batch->isEmpty()) + { + formBatch(); + sc_assert(!batch->isEmpty()); + } + + //prioritize batch first + if (batch->hasTransactionForBank(bank)) + { + return batch->getTransactionForBank(bank); + } + else + { + return buffer->getTransactionForBank(bank); + } +} + +void PAR_BS::popTransactionForBank(Bank bank, gp* payload) +{ + sc_assert(DramExtension::getExtension(payload).getBank() == bank); + buffer->popTransactionForBank(bank, payload); + batch->popTransactionForBank(bank, payload); + + if (!useExternalBankstates) + { + internalBankstates.openRowInRowBuffer(bank, DramExtension::getExtension(payload).getRow()); + } + +} + +void PAR_BS::formBatch() +{ + map loads; + + for (unsigned int b = 0; b < Configuration::getInstance().NumberOfBanks; ++b) + { + Bank bank(b); + for (unsigned int i = 0; i < capsize && buffer->hasTransactionForBank(bank); i++) + { + gp* payload = buffer->popOldest(bank); + loads[DramExtension::getExtension(payload).getThread()].addTransaction(payload); + } + } + + vector sortedLoads; + for (auto& threadLoadPair : loads) + { + sortedLoads.push_back(&threadLoadPair.second); + } + + sort(sortedLoads.begin(), sortedLoads.end(), LoadPointerComparer()); + + for (auto& load : sortedLoads) + { + batch->schedule(load->getTransactions()); + } + +} + +} /* namespace core */ diff --git a/dram/src/scheduler/PARBS.h b/dram/src/scheduler/PARBS.h new file mode 100644 index 00000000..19455285 --- /dev/null +++ b/dram/src/scheduler/PARBS.h @@ -0,0 +1,38 @@ +/* + * PARBS.h + * + * Created on: Apr 9, 2014 + * Author: robert + */ + +#ifndef PARBS_H_ +#define PARBS_H_ +#include "Scheduler.h" +#include "../core/ControllerCore.h" +#include "Fr_Fcfs.h" + +namespace scheduler { + +class PAR_BS : public Scheduler +{ +public: + PAR_BS(const core::BankStates& bankstates, bool useExternalBankstates, unsigned int capsize); + virtual ~PAR_BS(); + virtual bool hasTransactionForBank(Bank bank) override; + virtual void schedule(gp* payload) override; + virtual gp* getTransactionForBank(Bank bank) override; + virtual void popTransactionForBank(Bank bank, gp* payload) override; + +private: + void formBatch(); + bool useExternalBankstates; + const core::BankStates& externalBankstates; + core::BankStates internalBankstates; + FR_FCFS *batch; + FR_FCFS *buffer; + unsigned int capsize; +}; + +} /* scheduler core */ + +#endif /* PARBS_H_ */ diff --git a/dram/src/scheduler/ThreadLoad.cpp b/dram/src/scheduler/ThreadLoad.cpp new file mode 100644 index 00000000..fd551103 --- /dev/null +++ b/dram/src/scheduler/ThreadLoad.cpp @@ -0,0 +1,71 @@ +/* + * ThreadLoad.cpp + * + * Created on: Apr 9, 2014 + * Author: robert + */ + +#include "ThreadLoad.h" + +namespace scheduler { + +using namespace std; + +ThreadLoad::ThreadLoad() +{ + // TODO Auto-generated constructor stub + +} + +ThreadLoad::~ThreadLoad() +{ + // TODO Auto-generated destructor stub +} + +unsigned int ThreadLoad::getMaxBankLoad() const +{ + unsigned int maxLoad = 0; + for (auto& bankVectorPair : load) + { + if (bankVectorPair.second.size() > maxLoad) + maxLoad = bankVectorPair.second.size(); + } + return maxLoad; +} + +unsigned int ThreadLoad::getTotalLoad() const +{ + unsigned int totalLoad = 0; + for (auto& bankVectorPair : load) + { + totalLoad += bankVectorPair.second.size(); + } + return totalLoad; +} + +void ThreadLoad::addTransaction(gp* payload) +{ + load[DramExtension::getExtension(payload).getBank()].push_back(payload); +} + +bool operator<(const ThreadLoad& lhs, const ThreadLoad& rhs) +{ + if (lhs.getMaxBankLoad() < rhs.getMaxBankLoad()) + return true; + else if (lhs.getMaxBankLoad() == rhs.getMaxBankLoad()) + return lhs.getTotalLoad() < rhs.getTotalLoad(); + else + return false; +} + +vector ThreadLoad::getTransactions() +{ + vector result; + for (auto& bankVectorPair : load) + { + result.insert(result.end(), bankVectorPair.second.begin(), bankVectorPair.second.end()); + } + return result; +} + +} /* namespace scheduler */ diff --git a/dram/src/scheduler/ThreadLoad.h b/dram/src/scheduler/ThreadLoad.h new file mode 100644 index 00000000..9ccca269 --- /dev/null +++ b/dram/src/scheduler/ThreadLoad.h @@ -0,0 +1,44 @@ +/* + * ThreadLoad.h + * + * Created on: Apr 9, 2014 + * Author: robert + */ + +#ifndef THREADLOAD_H_ +#define THREADLOAD_H_ +#include +#include +#include "../common/dramExtension.h" + +namespace scheduler { + +typedef tlm::tlm_generic_payload gp; + +class ThreadLoad +{ +public: + ThreadLoad(); + virtual ~ThreadLoad(); + + unsigned int getMaxBankLoad() const; + unsigned int getTotalLoad() const; + + void addTransaction(gp* payload); + std::vector getTransactions(); + +private: + std::map> load; +}; + +bool operator< (const ThreadLoad &lhs, const ThreadLoad &rhs); + +struct LoadPointerComparer { + bool operator()(const ThreadLoad* l, const ThreadLoad* r) { + return *l < *r; + } +}; + +} /* namespace scheduler */ + +#endif /* THREADLOAD_H_ */ diff --git a/dram/src/simulation/Controller.h b/dram/src/simulation/Controller.h index fe4047b2..766bd5db 100644 --- a/dram/src/simulation/Controller.h +++ b/dram/src/simulation/Controller.h @@ -26,6 +26,7 @@ #include "../scheduler/Scheduler.h" #include "../scheduler/Fifo.h" #include "../scheduler/Fr_Fcfs.h" +#include "../scheduler/PARBS.h" using namespace std; using namespace tlm; @@ -61,10 +62,19 @@ public: void buildScheduler() { string selectedScheduler = Configuration::getInstance().Scheduler; + if (selectedScheduler == "FR_FCFS") - scheduler = new FR_FCFS(*controller, + { + scheduler = new FR_FCFS(controller->state.bankStates, Configuration::getInstance().RefreshAwareScheduling, Configuration::getInstance().AdaptiveOpenPagePolicy); + } + else if (selectedScheduler == "PAR_BS") + { + scheduler = new PAR_BS(controller->state.bankStates, + Configuration::getInstance().RefreshAwareScheduling, + Configuration::getInstance().Capsize); + } else if (selectedScheduler == "FIFO") scheduler = new Fifo(); else @@ -90,7 +100,7 @@ public: { case Command::Read: rec.recordPhase(payload, BEGIN_RD, command.getStart()); - dataStrobe = command.getIntervalOnDataStrobe(); + dataStrobe = command.getIntervalOnDataStrobe(); rec.updateDataStrobe(dataStrobe.start, dataStrobe.end, payload); rec.recordPhase(payload, END_RD, command.getEnd()); @@ -99,7 +109,7 @@ public: break; case Command::ReadA: rec.recordPhase(payload, BEGIN_RDA, command.getStart()); - dataStrobe = command.getIntervalOnDataStrobe(); + dataStrobe = command.getIntervalOnDataStrobe(); rec.updateDataStrobe(dataStrobe.start, dataStrobe.end, payload); rec.recordPhase(payload, END_RDA, command.getEnd()); @@ -108,7 +118,7 @@ public: break; case Command::Write: rec.recordPhase(payload, BEGIN_WR, command.getStart()); - dataStrobe = command.getIntervalOnDataStrobe(); + dataStrobe = command.getIntervalOnDataStrobe(); rec.updateDataStrobe(dataStrobe.start, dataStrobe.end, payload); rec.recordPhase(payload, END_WR, command.getEnd()); @@ -117,7 +127,7 @@ public: break; case Command::WriteA: rec.recordPhase(payload, BEGIN_WRA, command.getStart()); - dataStrobe = command.getIntervalOnDataStrobe(); + dataStrobe = command.getIntervalOnDataStrobe(); rec.updateDataStrobe(dataStrobe.start, dataStrobe.end, payload); rec.recordPhase(payload, END_WRA, command.getEnd()); diff --git a/dram/src/simulation/main.cpp b/dram/src/simulation/main.cpp deleted file mode 100644 index 26a75e68..00000000 --- a/dram/src/simulation/main.cpp +++ /dev/null @@ -1,52 +0,0 @@ -/* - * main.cpp - * - * Created on: Mar 16, 2014 - * Author: robert - */ - -#include -#include -#include "SimulationManager.h" -#include "../core/configuration/Configuration.h" - -#include - -using namespace std; -using namespace simulation; - -string pathOfFile(string file) -{ - return file.substr(0, file.find_last_of('/')); -} - -void startTraceAnalyzer(string traceName) -{ - string p = getenv("trace"); - string run_tpr = p + " " + traceName; - system(run_tpr.c_str()); -} - -int sc_main(int argc, char **argv) -{ - sc_set_time_resolution(1, SC_PS); - - string resources = pathOfFile(argv[0]) + string("/../resources/"); - - string memconfig = "memconfig.xml"; - string memspec = "MICRON_4Gb_DDR4-1866_8bit_A.xml"; -// string memspec = "MatzesWideIO.xml"; - string stl1 = "chstone-sha_32.stl"; - stl1 = "empty.stl"; - unsigned int burstlength1 = 4; - string stl2 = "mediabench-h263decode_32.stl"; - // stl2 = "trace.stl"; - unsigned int burstlength2 = 4; - string traceName = "tpr.tdb"; - - SimulationManager simulationManager("sim",memconfig,memspec,stl1,burstlength1, stl2,burstlength2, traceName, resources,false); - simulationManager.startSimulation(); - startTraceAnalyzer(traceName); - return 0; -} - From 27e00659fadceed578e1e96e89967f5699a356f3 Mon Sep 17 00:00:00 2001 From: robert Date: Thu, 10 Apr 2014 01:06:04 +0200 Subject: [PATCH 2/4] changed simulation manager --- dram/resources/scripts/createTraceDB.sql | 7 ++- dram/src/common/TlmRecorder.cpp | 47 +++++++------------- dram/src/common/TlmRecorder.h | 7 ++- dram/src/common/Utils.cpp | 45 ++++++++++++++----- dram/src/common/Utils.h | 1 + dram/src/core/utils/Utils.cpp | 2 +- dram/src/simulation/SimulationManager.cpp | 10 ++--- dram/src/simulation/SimulationManager.h | 2 +- dram/src/simulation/main.cpp | 53 +++++++++++------------ 9 files changed, 92 insertions(+), 82 deletions(-) diff --git a/dram/resources/scripts/createTraceDB.sql b/dram/resources/scripts/createTraceDB.sql index 179d1e22..136a3d41 100644 --- a/dram/resources/scripts/createTraceDB.sql +++ b/dram/resources/scripts/createTraceDB.sql @@ -17,9 +17,11 @@ CREATE TABLE GeneralInfo( NumberOfTransactions INTEGER, TraceEnd INTEGER, NumberOfBanks INTEGER, - Description TEXT, clk INTEGER, - UnitOfTime TEXT + UnitOfTime TEXT, + Memconfig TEXT, + Memspec TEXT, + Traces TEXt ); @@ -47,6 +49,7 @@ CREATE TABLE Transactions( TThread INTEGER, TChannel INTEGER, TBank INTEGER, + TBankgroup INTEGER, TRow INTEGER, TColumn INTEGER, Command TEXT, diff --git a/dram/src/common/TlmRecorder.cpp b/dram/src/common/TlmRecorder.cpp index 73a4dbae..d77184ff 100644 --- a/dram/src/common/TlmRecorder.cpp +++ b/dram/src/common/TlmRecorder.cpp @@ -41,8 +41,6 @@ void TlmRecorder::recordPhase(tlm::tlm_generic_payload& trans, tlm::tlm_phase ph if (currentTransactionsInSystem.count(&trans) == 0) introduceNewTransactionToSystem(time, trans); - unsigned int id = currentTransactionsInSystem[&trans]; - string phaseName = phaseNameToString(phase); string phaseBeginPrefix = "BEGIN_"; string phaseEndPrefix = "END_"; @@ -73,7 +71,7 @@ void TlmRecorder::recordDebugMessage(std::string message, sc_time time) void TlmRecorder::createTables(string pathToURI) { - string initial = getFileContents(pathToURI); + string initial = loadTextFileContents(pathToURI); executeSqlCommand(initial); } @@ -89,7 +87,7 @@ void TlmRecorder::setUpTransactionTerminatingPhases() void TlmRecorder::prepareSqlStatements() { insertTransactionString = - "INSERT INTO Transactions VALUES (:id,:rangeID,:address,:burstlength,:thread,:channel,:bank,:row,:column,:command,:dataStrobeBegin,:dataStrobeEnd)"; + "INSERT INTO Transactions VALUES (:id,:rangeID,:address,:burstlength,:thread,:channel,:bank,:bankgroup,:row,:column,:command,:dataStrobeBegin,:dataStrobeEnd)"; insertRangeString = "INSERT INTO Ranges VALUES (:id,:begin,:end)"; updateRangeString = "UPDATE Ranges SET End = :end WHERE ID = :id"; updateDataStrobeString = "UPDATE Transactions SET DataStrobeBegin = :begin, DataStrobeEnd = :end WHERE ID = :id"; @@ -99,7 +97,8 @@ void TlmRecorder::prepareSqlStatements() updatePhaseString = "UPDATE Phases SET PhaseEnd = :end WHERE Transact = :trans AND PhaseName = :name"; insertGeneralInfoString = - "INSERT INTO GeneralInfo (NumberOfTransactions,TraceEnd,NumberOfBanks,description,clk,UnitOfTime) Values (:numberOfTransactions,:end,:numberOfBanks,:description,:clk,:unitOfTime)"; + "INSERT INTO GeneralInfo (NumberOfTransactions,TraceEnd,NumberOfBanks,clk,UnitOfTime,Memconfig,Memspec,Traces) Values " + "(:numberOfTransactions,:end,:numberOfBanks,:clk,:unitOfTime,:memconfig,:memspec,:traces)"; insertDebugMessageString = "INSERT INTO DebugMessages (Time,Message) Values (:time,:message)"; sqlite3_prepare(db, insertTransactionString.c_str(), -1, &insertTransactionStatement, 0); @@ -134,9 +133,11 @@ void TlmRecorder::insertGeneralInfo() sqlite3_bind_int64(insertGeneralInfoStatement, 2, recordingEndTime.value()); sqlite3_bind_int(insertGeneralInfoStatement, 3, core::Configuration::getInstance().NumberOfBanks); - sqlite3_bind_text(insertGeneralInfoStatement, 4, "", 0, NULL); - sqlite3_bind_int(insertGeneralInfoStatement, 5, core::Configuration::getInstance().Timings.clk.value()); - sqlite3_bind_text(insertGeneralInfoStatement, 6, "PS", 2, NULL); + sqlite3_bind_int(insertGeneralInfoStatement, 4, core::Configuration::getInstance().Timings.clk.value()); + sqlite3_bind_text(insertGeneralInfoStatement, 5, "PS", 2, NULL); + sqlite3_bind_text(insertGeneralInfoStatement, 6, memconfig.c_str(), memconfig.length(), NULL); + sqlite3_bind_text(insertGeneralInfoStatement, 7, memspec.c_str(), memspec.length(), NULL); + sqlite3_bind_text(insertGeneralInfoStatement, 8, traces.c_str(), traces.length(), NULL); executeSqlStatement(insertGeneralInfoStatement); } void TlmRecorder::insertTransactionInDB(unsigned int id, tlm::tlm_generic_payload& trans) @@ -145,17 +146,17 @@ void TlmRecorder::insertTransactionInDB(unsigned int id, tlm::tlm_generic_payloa sqlite3_bind_int(insertTransactionStatement, 2, id); sqlite3_bind_int(insertTransactionStatement, 3, trans.get_address()); sqlite3_bind_int(insertTransactionStatement, 4, trans.get_streaming_width()); - sqlite3_bind_text(insertTransactionStatement, 10, - trans.get_command() == tlm::TLM_READ_COMMAND ? "R" : "W", 1, 0); + const DramExtension& extension = DramExtension::getExtension(trans); sqlite3_bind_int(insertTransactionStatement, 5, extension.getThread().ID()); sqlite3_bind_int(insertTransactionStatement, 6, extension.getChannel().ID()); sqlite3_bind_int(insertTransactionStatement, 7, extension.getBank().ID()); - sqlite3_bind_int(insertTransactionStatement, 8, extension.getRow().ID()); - sqlite3_bind_int(insertTransactionStatement, 9, extension.getColumn().ID()); - sqlite3_bind_int(insertTransactionStatement, 10, 0); + sqlite3_bind_int(insertTransactionStatement, 8, extension.getBankGroup().ID()); + sqlite3_bind_int(insertTransactionStatement, 9, extension.getRow().ID()); + sqlite3_bind_int(insertTransactionStatement, 10, extension.getColumn().ID()); sqlite3_bind_int(insertTransactionStatement, 11, 0); + sqlite3_bind_int(insertTransactionStatement, 12, 0); executeSqlStatement(insertTransactionStatement); } @@ -244,25 +245,7 @@ void TlmRecorder::executeSqlCommand(string command) printDebugMessage("Database created successfully"); } -string TlmRecorder::getFileContents(string filename) -{ - ifstream in(filename.c_str(), ios::in | ios::binary); - if (in) - { - string contents; - in.seekg(0, ios::end); - contents.resize(in.tellg()); - in.seekg(0, ios::beg); - in.read(&contents[0], contents.size()); - in.close(); - return (contents); - } - else - { - reportFatal("Error in TraceRecorder", "Could not load sql script from " + filename); - return ""; - } - } + void TlmRecorder::printDebugMessage(std::string message) { diff --git a/dram/src/common/TlmRecorder.h b/dram/src/common/TlmRecorder.h index a719b506..19293037 100755 --- a/dram/src/common/TlmRecorder.h +++ b/dram/src/common/TlmRecorder.h @@ -30,12 +30,14 @@ public: void recordDebugMessage(std::string message, sc_time time); void updateDataStrobe(const sc_time& begin, const sc_time& end, tlm::tlm_generic_payload& trans); void closeConnection(); - + void recordMemconfig(string memconfig){this->memconfig = memconfig;} + void recordMemspec(string memspec){this->memspec = memspec;} + void recordTracenames(string traces){this->traces = traces;} private: + std::string memconfig,memspec,traces; TlmRecorder(); ~TlmRecorder(); - std::string getFileContents(std::string filename); void executeSqlCommand(std::string command); void executeSqlStatement(sqlite3_stmt* statement); @@ -59,6 +61,7 @@ private: map currentTransactionsInSystem; unsigned int transactionIDCounter; sc_time recordingEndTime; + std::vector transactionTerminatingPhases; sqlite3 *db; sqlite3_stmt *insertTransactionStatement, *insertRangeStatement, *updateRangeStatement, diff --git a/dram/src/common/Utils.cpp b/dram/src/common/Utils.cpp index 5696e9f6..2b9fd287 100644 --- a/dram/src/common/Utils.cpp +++ b/dram/src/common/Utils.cpp @@ -1,6 +1,7 @@ #include "Utils.h" #include #include +#include using namespace std; using namespace tinyxml2; @@ -10,7 +11,6 @@ void reportFatal(std::string sender, std::string message) SC_REPORT_FATAL(sender.c_str(), message.c_str()); } - std::string phaseNameToString(tlm::tlm_phase phase) { std::ostringstream oss; @@ -19,7 +19,8 @@ std::string phaseNameToString(tlm::tlm_phase phase) return str; } -unsigned int queryUIntParameter(XMLElement* node, string name) { +unsigned int queryUIntParameter(XMLElement* node, string name) +{ int result; XMLElement* element; for (element = node->FirstChildElement("parameter"); element != NULL; @@ -34,7 +35,7 @@ unsigned int queryUIntParameter(XMLElement* node, string name) { } } - reportFatal("Query XML","Parameter '" + name +"' does not exist."); + reportFatal("Query XML", "Parameter '" + name + "' does not exist."); return 0; } @@ -52,7 +53,8 @@ bool parameterExists(tinyxml2::XMLElement* node, std::string name) return false; } -double queryDoubleParameter(XMLElement* node, string name) { +double queryDoubleParameter(XMLElement* node, string name) +{ double result; XMLElement* element; for (element = node->FirstChildElement("parameter"); element != NULL; @@ -67,11 +69,12 @@ double queryDoubleParameter(XMLElement* node, string name) { } } - reportFatal("Query XML","Parameter '" + name +"' does not exist."); + reportFatal("Query XML", "Parameter '" + name + "' does not exist."); return 0; } -bool queryBoolParameter(XMLElement* node, string name) { +bool queryBoolParameter(XMLElement* node, string name) +{ bool result; XMLElement* element; for (element = node->FirstChildElement("parameter"); element != NULL; @@ -86,11 +89,12 @@ bool queryBoolParameter(XMLElement* node, string name) { } } - reportFatal("Query XML","Parameter '" + name +"' does not exist."); + reportFatal("Query XML", "Parameter '" + name + "' does not exist."); return 0; } -string queryStringParameter(XMLElement* node, string name) { +string queryStringParameter(XMLElement* node, string name) +{ XMLElement* element; for (element = node->FirstChildElement("parameter"); element != NULL; element = element->NextSiblingElement("parameter")) @@ -101,7 +105,7 @@ string queryStringParameter(XMLElement* node, string name) { } } - reportFatal("Query XML","Parameter '" + name +"' does not exist."); + reportFatal("Query XML", "Parameter '" + name + "' does not exist."); return 0; } @@ -109,8 +113,29 @@ void loadXML(string uri, XMLDocument& doc) { XMLError error = doc.LoadFile(uri.c_str()); - if (error) { + if (error) + { reportFatal("Configuration", "Error loading xml from: " + uri); } } +string loadTextFileContents(string filename) +{ + + ifstream in(filename.c_str(), ios::in | ios::binary); + if (in) + { + string contents; + in.seekg(0, ios::end); + contents.resize(in.tellg()); + in.seekg(0, ios::beg); + in.read(&contents[0], contents.size()); + in.close(); + return (contents); + } + else + { + reportFatal("Error loading file", "Could not load textfile from " + filename); + return ""; + } +} diff --git a/dram/src/common/Utils.h b/dram/src/common/Utils.h index 2c1ee2f9..503de3fa 100644 --- a/dram/src/common/Utils.h +++ b/dram/src/common/Utils.h @@ -41,6 +41,7 @@ bool isIn(const T& value, const std::vector& collection) void reportFatal(std::string sender, std::string message); std::string phaseNameToString(tlm::tlm_phase phase); +std::string loadTextFileContents(std::string filename); void loadXML(std::string uri, tinyxml2::XMLDocument& doc); bool parameterExists(tinyxml2::XMLElement* node, std::string name); diff --git a/dram/src/core/utils/Utils.cpp b/dram/src/core/utils/Utils.cpp index 23aa45c2..8d002557 100644 --- a/dram/src/core/utils/Utils.cpp +++ b/dram/src/core/utils/Utils.cpp @@ -67,7 +67,7 @@ BankGroup getBankGroup(Bank bank) for (unsigned int bank = 0; bank < Configuration::getInstance().NumberOfBanks; bank++) { - unsigned int group = bank / Configuration::getInstance().NumberOfBankGroups; + unsigned int group = bank % Configuration::getInstance().NumberOfBankGroups; bankgroups.insert(std::pair(Bank(bank), BankGroup(group))); } } diff --git a/dram/src/simulation/SimulationManager.cpp b/dram/src/simulation/SimulationManager.cpp index 99630909..a56a1ffc 100644 --- a/dram/src/simulation/SimulationManager.cpp +++ b/dram/src/simulation/SimulationManager.cpp @@ -30,17 +30,15 @@ Simulation::Simulation(sc_module_name name, string pathToResources, string trace Configuration::memconfigUri = pathToResources + string("configs/memconfigs/") + setup.memconfig; Configuration::memspecUri = pathToResources + string("configs/memspecs/") + setup.memspec; + TlmRecorder::getInstance().recordTracenames(devices[0].trace + "," + devices[1].trace); + TlmRecorder::getInstance().recordMemspec(Configuration::memspecUri); + TlmRecorder::getInstance().recordMemconfig(loadTextFileContents(Configuration::memconfigUri)); + //setup dram dram = new Dram<>("dram"); arbiter = new Arbiter("arbiter"); controller = new Controller<>("controller"); - //setup devices - for(auto& d : devices) - { - if(d.burstLength == 0) - d.burstLength = 8; - } player1 = new TracePlayer<>("player1", pathToResources + string("traces/") + devices[0].trace, devices[0].burstLength, this); diff --git a/dram/src/simulation/SimulationManager.h b/dram/src/simulation/SimulationManager.h index 437d00f4..efb11b94 100644 --- a/dram/src/simulation/SimulationManager.h +++ b/dram/src/simulation/SimulationManager.h @@ -29,7 +29,7 @@ struct DramSetup struct Device { Device():trace("empty.stl"), burstLength(0){} - Device(std::string trace, unsigned int burstLength = 0) : trace(trace), burstLength(burstLength) + Device(std::string trace, unsigned int burstLength = 4) : trace(trace), burstLength(burstLength) { } std::string trace; diff --git a/dram/src/simulation/main.cpp b/dram/src/simulation/main.cpp index 81f10c48..15c51195 100644 --- a/dram/src/simulation/main.cpp +++ b/dram/src/simulation/main.cpp @@ -25,8 +25,6 @@ string pathOfFile(string file) return file.substr(0, file.find_last_of('/')); } - - void startTraceAnalyzer(string traceName) { string p = getenv("trace"); @@ -50,49 +48,48 @@ bool runSimulation(string resources, string traceName, DramSetup setup, vector> tracePairs) { - int id =0; - for(pair pair : tracePairs) + int id = 0; + for (pair pair : tracePairs) { id++; - string traceName = "batch" + to_string(id) + ".tdb"; - if(runSimulation(resources, traceName, setup, { Device(pair.first), Device(pair.second) })) - return true;//kill child + string traceName = "traceBatch" + to_string(id) + ".tdb"; + if (runSimulation(resources, traceName, setup, { Device(pair.first), Device(pair.second) })) + return true; //kill child } } -bool batchSetups(pairtracePair, vector setups) +bool batchSetups(pair tracePair, vector setups) { - int id =0; - for(auto& setup : setups) + int id = 0; + for (auto& setup : setups) { id++; - string traceName = "batch0" + to_string(id) + ".tdb"; - if(runSimulation(resources, traceName, setup, { Device(tracePair.first), Device(tracePair.second) })) - return true;//kill child + string traceName = "setupBatch" + to_string(id) + ".tdb"; + if (runSimulation(resources, traceName, setup, + { Device(tracePair.first), Device(tracePair.second) })) + return true; //kill child } } int sc_main(int argc, char **argv) { sc_set_time_resolution(1, SC_PS); - resources = pathOfFile(argv[0]) + string("/../resources/"); - - - DramSetup setup; - setup.memconfig = "memconfig.xml"; - //setup.memspec = "MICRON_4Gb_DDR4-1866_8bit_A.xml"; - setup.memspec = "MatzesWideIO.xml"; - - DramSetup setup2; - setup2.memconfig = "memconfig.xml"; - setup2.memspec = "MICRON_4Gb_DDR4-1866_8bit_A.xml"; + resources = pathOfFile(argv[0]) + string("/../resources/"); + DramSetup setup; + setup.memconfig = "memconfig.xml"; + setup.memspec = "MICRON_4Gb_DDR4-1866_8bit_A.xml"; + //setup.memspec = "MatzesWideIO.xml"; vector> tracePairs; - tracePairs.push_back(pair("trace.stl", "empty.stl")); - tracePairs.push_back(pair("trace2.stl", "empty.stl")); - //batchTraces(setup, tracePairs); -batchSetups(tracePairs[0], {setup, setup2}); + tracePairs.push_back(pair("chstone-mips_32.stl", "chstone-motion_32.stl")); + + batchTraces(setup, tracePairs); + +// DramSetup setup2; +// setup2.memconfig = "memconfig.xml"; +// setup2.memspec = "MICRON_4Gb_DDR4-1866_8bit_A.xml"; + //batchSetups(tracePairs[0], { setup, setup2 }); return 0; } From a433ad6fcfe048e265f63e541b2d5ac75c263440 Mon Sep 17 00:00:00 2001 From: robert Date: Thu, 10 Apr 2014 10:14:20 +0200 Subject: [PATCH 3/4] bankgroup is now recorded --- dram/.cproject | 2 +- dram/.gitignore | 3 +- dram/resources/configs/memconfigs/fifo.xml | 11 +++++ dram/resources/configs/memconfigs/fr_fcfs.xml | 11 +++++ .../configs/memconfigs/fr_fcfs_unaware.xml | 11 +++++ dram/resources/configs/memconfigs/par_bs.xml | 11 +++++ .../configs/memconfigs/par_bs_unaware.xml | 11 +++++ .../configs/memspecs/MatzesWideIO.xml | 2 +- dram/src/common/DebugManager.cpp | 2 +- dram/src/simulation/Controller.h | 5 +++ dram/src/simulation/SimulationManager.cpp | 3 -- dram/src/simulation/main.cpp | 43 +++++++++++++------ 12 files changed, 95 insertions(+), 20 deletions(-) create mode 100644 dram/resources/configs/memconfigs/fifo.xml create mode 100644 dram/resources/configs/memconfigs/fr_fcfs.xml create mode 100644 dram/resources/configs/memconfigs/fr_fcfs_unaware.xml create mode 100644 dram/resources/configs/memconfigs/par_bs.xml create mode 100644 dram/resources/configs/memconfigs/par_bs_unaware.xml diff --git a/dram/.cproject b/dram/.cproject index 362fbe05..4e75fe86 100644 --- a/dram/.cproject +++ b/dram/.cproject @@ -19,7 +19,7 @@ -