diff --git a/dram/resources/configs/memconfigs/fifo.xml b/dram/resources/configs/memconfigs/fifo.xml
index 5cbb790e..35395479 100644
--- a/dram/resources/configs/memconfigs/fifo.xml
+++ b/dram/resources/configs/memconfigs/fifo.xml
@@ -2,7 +2,7 @@
   <BankwiseLogic value="0"/>
   <OpenPagePolicy value="1" />
   <MaxNrOfTransactions value="50" />
-  <Scheduler value="FIFO" />
+  <Scheduler value="FIFO_STRICT" />
   <Capsize value="5" />
   <PowerDownMode value="TimeoutPDN" />
   <PowerDownTimeout value="100" />
diff --git a/dram/resources/configs/memconfigs/fifoStrict.xml b/dram/resources/configs/memconfigs/fifoStrict.xml
new file mode 100644
index 00000000..35395479
--- /dev/null
+++ b/dram/resources/configs/memconfigs/fifoStrict.xml
@@ -0,0 +1,9 @@
+<memconfig>
+  <BankwiseLogic value="0"/>
+  <OpenPagePolicy value="1" />
+  <MaxNrOfTransactions value="50" />
+  <Scheduler value="FIFO_STRICT" />
+  <Capsize value="5" />
+  <PowerDownMode value="TimeoutPDN" />
+  <PowerDownTimeout value="100" />
+</memconfig>
diff --git a/dram/resources/simulations/sim-batch.xml b/dram/resources/simulations/sim-batch.xml
index bed17c6a..5cfb81b9 100644
--- a/dram/resources/simulations/sim-batch.xml
+++ b/dram/resources/simulations/sim-batch.xml
@@ -1,4 +1,4 @@
-<simulation>
+<!-- <simulation>
         <simconfig>
                     <Debug value="1" />
                     <DatabaseRecording value="1" />
@@ -17,9 +17,33 @@
 
 <tracesetups>
       <tracesetup id="fifo">
-       <!--<device clkMhz="200">test.stl</device>-->
+       <device clkMhz="200">test.stl</device>-
        <device clkMhz="200">mediabench-epic_32.stl</device>
 </tracesetup>
   </tracesetups>
 </simulation>
+ -->
+
+<simulation>
+        <simconfig>
+                    <Debug value="1" />
+                    <DatabaseRecording value="1" />
+                    <PowerAnalysys value="1" />
+        </simconfig>
+        <memspecs>
+                <memspec src="/home/jungma/projects/dram.vp.system/dram/resources/configs/memspecs/WideIO.xml"></memspec>
+        </memspecs>
+        <addressmappings>
+                <addressmapping src="/home/jungma/projects/dram.vp.system/dram/resources/configs/amconfigs/am_wideio.xml"></addressmapping>
+        </addressmappings>
+        <memconfigs>
+           <memconfig src="/home/jungma/projects/dram.vp.system/dram/resources/configs/memconfigs/fifo.xml"/>
+        </memconfigs>
+
+<tracesetups>
+      <tracesetup id="fifo">
+       <device clkMhz="200">voco2.stl</device>
+</tracesetup>
+  </tracesetups>
+</simulation>
 
diff --git a/dram/src/controller/scheduler/FifoStrict.cpp b/dram/src/controller/scheduler/FifoStrict.cpp
index 8699500f..bc7b9b12 100644
--- a/dram/src/controller/scheduler/FifoStrict.cpp
+++ b/dram/src/controller/scheduler/FifoStrict.cpp
@@ -28,20 +28,9 @@ void FifoStrict::NotifyBeginRD()
 
     if(buffer.size() > 0)
     {
-        // If the new front element was orginally blocked, because it had to wait on the preceeding fron element, we have to unblock it.
-        // We only have to unblock if the new fron element is waiting for a RD/WR operation
-        if(commandIsIn(getNextCommand(*buffer.front()), {Command::Read, Command::Write, Command::ReadA, Command::WriteA})
-                && !controllerCore.bankIsBusy(DramExtension::getBank(buffer.front())))
-        {
-            printDebugMessage("Unblocking front element.\n");
-            controller.scheduleNextFromScheduler(DramExtension::getBank(buffer.front()));
-        }
-        // If the new front element is on the same bank as the old one, we have let it make progress, even when the next command is not a RD/WR
-        // because we are not calling scheduleNextFromScheduler from the calling side
-        else if(oldFrontElementBank == DramExtension::getBank(*buffer.front()))
-        {
-            controller.scheduleNextFromScheduler(DramExtension::getBank(buffer.front()));
-        }
+        // If the new front element was orginally blocked, because it had to wait on the old front element, we have to call
+        // controller.scheduleNextFromScheduler explicitly, otherwise there will be a deadlock in the system
+        controller.scheduleNextFromScheduler(DramExtension::getBank(buffer.front()));
     }
 
 }