diff --git a/DRAMSys/library/src/controller/BankMachine.cpp b/DRAMSys/library/src/controller/BankMachine.cpp index ab17ed03..36ea5414 100644 --- a/DRAMSys/library/src/controller/BankMachine.cpp +++ b/DRAMSys/library/src/controller/BankMachine.cpp @@ -1,3 +1,37 @@ +/* + * Copyright (c) 2019, University of Kaiserslautern + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Lukas Steiner + */ + #include "BankMachine.h" BankMachine::BankMachine(SchedulerIF *scheduler, CheckerDDR3New *checker, Bank bank) diff --git a/DRAMSys/library/src/controller/BankMachine.h b/DRAMSys/library/src/controller/BankMachine.h index 33750f44..dc561680 100644 --- a/DRAMSys/library/src/controller/BankMachine.h +++ b/DRAMSys/library/src/controller/BankMachine.h @@ -1,3 +1,37 @@ +/* + * Copyright (c) 2019, University of Kaiserslautern + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Lukas Steiner + */ + #ifndef BANKMACHINE_H #define BANKMACHINE_H diff --git a/DRAMSys/library/src/controller/ControllerNew.cpp b/DRAMSys/library/src/controller/ControllerNew.cpp index 27f19437..f0ace2e7 100644 --- a/DRAMSys/library/src/controller/ControllerNew.cpp +++ b/DRAMSys/library/src/controller/ControllerNew.cpp @@ -1,4 +1,39 @@ +/* + * Copyright (c) 2019, University of Kaiserslautern + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Lukas Steiner + */ + #include "ControllerNew.h" + #include "core/configuration/Configuration.h" #include "scheduler/SchedulerFifo.h" #include "scheduler/SchedulerFrFcfs.h" @@ -19,8 +54,7 @@ ControllerNew::ControllerNew(sc_module_name name) : tSocket.register_transport_dbg(this, &ControllerNew::transport_dbg); iSocket.register_nb_transport_bw(this, &ControllerNew::nb_transport_bw); - state = new ControllerState("Controller", &Configuration::getInstance()); - checker = new CheckerDDR3New(Configuration::getInstance(), *state); + checker = new CheckerDDR3New(); scheduler = new SchedulerFifo(); for (unsigned bankID = 0; bankID < Configuration::getInstance().memSpec->NumberOfBanks; bankID++) bankMachines[Bank(bankID)] = new BankMachine(scheduler, checker, Bank(bankID)); @@ -29,7 +63,6 @@ ControllerNew::ControllerNew(sc_module_name name) : ControllerNew::~ControllerNew() { - delete state; delete checker; for (auto it : bankMachines) delete it.second; @@ -198,8 +231,7 @@ void ControllerNew::sendToDram(Command command, tlm_generic_payload *payload) { sc_time execTime = Configuration::getInstance().memSpec->getExecutionTime(command, *payload); ScheduledCommand scheduledCommand(command, sc_time_stamp(), execTime, *payload); - state->cleanUp(sc_time_stamp()); - state->change(scheduledCommand); + checker->insert(scheduledCommand); sc_time delay = SC_ZERO_TIME; tlm_phase phase; @@ -208,13 +240,9 @@ void ControllerNew::sendToDram(Command command, tlm_generic_payload *payload) else if (command == Command::PRE) phase = BEGIN_PRE; else if (command == Command::RD) - { phase = BEGIN_RD; - } else if (command == Command::WR) - { phase = BEGIN_WR; - } else SC_REPORT_FATAL("ControllerNew", "Unknown phase"); diff --git a/DRAMSys/library/src/controller/ControllerNew.h b/DRAMSys/library/src/controller/ControllerNew.h index aae06319..e1dd1c0f 100644 --- a/DRAMSys/library/src/controller/ControllerNew.h +++ b/DRAMSys/library/src/controller/ControllerNew.h @@ -1,3 +1,37 @@ +/* + * Copyright (c) 2019, University of Kaiserslautern + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Lukas Steiner + */ + #ifndef CONTROLLERNEW_H #define CONTROLLERNEW_H @@ -15,7 +49,6 @@ #include "scheduler/SchedulerIF.h" #include "../common/DebugManager.h" #include "core/scheduling/checker/CheckerDDR3New.h" -#include "ControllerState.h" using namespace tlm; @@ -44,7 +77,7 @@ protected: void printDebugMessage(string message); -//private: +private: unsigned numberOfPayloads = 0; tlm_generic_payload *payloadToAcquire = nullptr; sc_time timeToAcquire = SC_ZERO_TIME; @@ -54,7 +87,6 @@ protected: DebugManager *debugManager; - ControllerState *state; std::map bankMachines; CmdMuxIF *commandMux; SchedulerIF *scheduler; diff --git a/DRAMSys/library/src/controller/ControllerRecordable.cpp b/DRAMSys/library/src/controller/ControllerRecordable.cpp index 30a54c7b..95f101a1 100644 --- a/DRAMSys/library/src/controller/ControllerRecordable.cpp +++ b/DRAMSys/library/src/controller/ControllerRecordable.cpp @@ -1,4 +1,39 @@ +/* + * Copyright (c) 2019, University of Kaiserslautern + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Lukas Steiner + */ + #include "ControllerRecordable.h" + #include "../common/protocol.h" tlm_sync_enum ControllerRecordable::nb_transport_fw(tlm_generic_payload &trans, @@ -21,39 +56,17 @@ void ControllerRecordable::sendToFrontend(tlm_generic_payload *payload, tlm_phas recordPhase(*payload, phase, delay); tSocket->nb_transport_bw(*payload, phase, delay); } -// TODO: call ControllerNew::sendToDram + void ControllerRecordable::sendToDram(Command command, tlm_generic_payload *payload) { - sc_time execTime = Configuration::getInstance().memSpec->getExecutionTime(command, *payload); - ScheduledCommand scheduledCommand(command, sc_time_stamp(), execTime, *payload); - state->cleanUp(sc_time_stamp()); - state->change(scheduledCommand); - Bank bank = scheduledCommand.getBank(); - - sc_time delay = SC_ZERO_TIME; - tlm_phase phase; - if (command == Command::ACT) - phase = BEGIN_ACT; - else if (command == Command::PRE) - phase = BEGIN_PRE; - else if (command == Command::RD) + if (command == Command::RD || command == Command::WR) { - phase = BEGIN_RD; - ScheduledCommand scheduledCommand = state->getLastCommandOnBank(command, bank); + sc_time execTime = Configuration::getInstance().memSpec->getExecutionTime(command, *payload); + ScheduledCommand scheduledCommand(command, sc_time_stamp(), execTime, *payload); TimeInterval dataStrobe = scheduledCommand.getIntervalOnDataStrobe(); tlmRecorder->updateDataStrobe(dataStrobe.start, dataStrobe.end, *payload); } - else if (command == Command::WR) - { - phase = BEGIN_WR; - ScheduledCommand scheduledCommand = state->getLastCommandOnBank(command, bank); - TimeInterval dataStrobe = scheduledCommand.getIntervalOnDataStrobe(); - tlmRecorder->updateDataStrobe(dataStrobe.start, dataStrobe.end, *payload); - } - else - SC_REPORT_FATAL("ControllerNew", "Unknown phase"); - - iSocket->nb_transport_fw(*payload, phase, delay); + ControllerNew::sendToDram(command, payload); } void ControllerRecordable::recordPhase(tlm_generic_payload &trans, tlm_phase phase, sc_time delay) diff --git a/DRAMSys/library/src/controller/ControllerRecordable.h b/DRAMSys/library/src/controller/ControllerRecordable.h index 0540bd78..17459b7d 100644 --- a/DRAMSys/library/src/controller/ControllerRecordable.h +++ b/DRAMSys/library/src/controller/ControllerRecordable.h @@ -1,3 +1,37 @@ +/* + * Copyright (c) 2019, University of Kaiserslautern + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Lukas Steiner + */ + #ifndef CONTROLLERRECORDABLE_H #define CONTROLLERRECORDABLE_H diff --git a/DRAMSys/library/src/controller/ControllerState.cpp b/DRAMSys/library/src/controller/ControllerState.cpp index bc95cfb7..9f3b9a2d 100644 --- a/DRAMSys/library/src/controller/ControllerState.cpp +++ b/DRAMSys/library/src/controller/ControllerState.cpp @@ -54,20 +54,7 @@ const ScheduledCommand ControllerState::getLastCommand(Command command) const ScheduledCommand ControllerState::getLastScheduledCommand() { - ScheduledCommand lastCommand; - - for (Command cmd : getAllCommands()) { - for (Bank bank : Configuration::getInstance().memSpec->getBanks()) { - ScheduledCommand ¤t = lastScheduledByCommandAndBank[cmd][bank]; - if (current.getStart() > lastCommand.getStart()) - lastCommand = current; - } - } - - printDebugMessage("Last scheduled command was " + commandToString( - lastCommand.getCommand())); - - return lastCommand; + return lastScheduled; } const ScheduledCommand ControllerState::getLastScheduledCommand(Bank bank) @@ -93,10 +80,11 @@ void ControllerState::change(const ScheduledCommand &scheduledCommand) scheduledCommand.getBank().ID()) + " command is " + commandToString( command)); - bus.blockSlot(scheduledCommand.getStart()); + //bus.blockSlot(scheduledCommand.getStart()); lastScheduledByCommandAndBank[command][scheduledCommand.getBank()] = scheduledCommand; lastScheduledByCommand[command] = scheduledCommand; + lastScheduled = scheduledCommand; // TODO: implement FAW for ACTB if (command == Command::ACT) diff --git a/DRAMSys/library/src/controller/ControllerState.h b/DRAMSys/library/src/controller/ControllerState.h index 2e02c693..6430c5ba 100644 --- a/DRAMSys/library/src/controller/ControllerState.h +++ b/DRAMSys/library/src/controller/ControllerState.h @@ -65,7 +65,7 @@ public: // TODO: remove std::map lastScheduledByCommand; //std::map lastScheduledByBank; - //ScheduledCommand lastScheduled; + ScheduledCommand lastScheduled; Slots bus; std::queue lastActivates; diff --git a/DRAMSys/library/src/controller/cmdmux/CmdMuxIF.h b/DRAMSys/library/src/controller/cmdmux/CmdMuxIF.h index 7e700862..2e599656 100644 --- a/DRAMSys/library/src/controller/cmdmux/CmdMuxIF.h +++ b/DRAMSys/library/src/controller/cmdmux/CmdMuxIF.h @@ -1,3 +1,37 @@ +/* + * Copyright (c) 2019, University of Kaiserslautern + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Lukas Steiner + */ + #ifndef CMDMUXIF_H #define CMDMUXIF_H diff --git a/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.cpp b/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.cpp index d912e4de..6414c3ce 100644 --- a/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.cpp +++ b/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.cpp @@ -1,4 +1,39 @@ +/* + * Copyright (c) 2019, University of Kaiserslautern + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Lukas Steiner + */ + #include "CmdMuxOldest.h" + #include "../../common/dramExtensions.h" std::pair diff --git a/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.h b/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.h index cb3c1d1d..124d056c 100644 --- a/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.h +++ b/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.h @@ -1,3 +1,37 @@ +/* + * Copyright (c) 2019, University of Kaiserslautern + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Lukas Steiner + */ + #ifndef CMDMUXOLDEST_H #define CMDMUXOLDEST_H diff --git a/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.cpp b/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.cpp index 0b39329e..024beaf3 100644 --- a/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.cpp +++ b/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.cpp @@ -1,4 +1,39 @@ +/* + * Copyright (c) 2019, University of Kaiserslautern + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Lukas Steiner + */ + #include "CmdMuxStrict.h" + #include "../../common/dramExtensions.h" std::pair diff --git a/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.h b/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.h index e5228e99..8c98b8c6 100644 --- a/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.h +++ b/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.h @@ -1,3 +1,37 @@ +/* + * Copyright (c) 2019, University of Kaiserslautern + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Lukas Steiner + */ + #ifndef CMDMUXSTRICT_H #define CMDMUXSTRICT_H diff --git a/DRAMSys/library/src/controller/core/scheduling/checker/CheckerDDR3New.cpp b/DRAMSys/library/src/controller/core/scheduling/checker/CheckerDDR3New.cpp index 29ed9c19..c4f8f007 100644 --- a/DRAMSys/library/src/controller/core/scheduling/checker/CheckerDDR3New.cpp +++ b/DRAMSys/library/src/controller/core/scheduling/checker/CheckerDDR3New.cpp @@ -1,3 +1,37 @@ +/* + * Copyright (c) 2019, University of Kaiserslautern + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Lukas Steiner + */ + #include "CheckerDDR3New.h" #include @@ -19,156 +53,153 @@ sc_time CheckerDDR3New::delayToSatisfyConstraints(Command command, Bank bank) if (command == Command::ACT) { - lastCommand = state.getLastCommandOnBank(Command::RDA, bank); + lastCommand = lastScheduledByCommandAndBank[Command::RDA][bank]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tRTP + memSpec->tRP); - lastCommand = state.getLastCommandOnBank(Command::WRA, bank); + lastCommand = lastScheduledByCommandAndBank[Command::WRA][bank]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tWL + memSpec->tCCD + memSpec->tWR + memSpec->tRP); - lastCommand = state.getLastCommandOnBank(Command::PRE, bank); + lastCommand = lastScheduledByCommandAndBank[Command::PRE][bank]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tRP); - lastCommand = state.getLastCommandOnBank(Command::PREA, bank); + lastCommand = lastScheduledByCommand[Command::PREA]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tRP); - lastCommand = state.getLastCommandOnBank(Command::PDXA, bank); + lastCommand = lastScheduledByCommand[Command::PDXA]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tXP); - lastCommand = state.getLastCommandOnBank(Command::PDXP, bank); + lastCommand = lastScheduledByCommand[Command::PDXP]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tXP); - lastCommand = state.getLastCommandOnBank(Command::REFA, bank); + lastCommand = lastScheduledByCommand[Command::REFA]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tRFC); - lastCommand = state.getLastCommandOnBank(Command::SREFEX, bank); + lastCommand = lastScheduledByCommand[Command::SREFEX]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tXS); - lastCommand = state.getLastCommandOnBank(Command::ACT, bank); + lastCommand = lastScheduledByCommandAndBank[Command::ACT][bank]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tRC); - lastCommand = state.getLastCommand(Command::ACT); + lastCommand = lastScheduledByCommand[Command::ACT]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tRRD); - if (!state.bus.isFree(sc_time_stamp())) - minTimeToWait = max(minTimeToWait, sc_time_stamp() + memSpec->clk); - minTimeToWait = max(minTimeToWait, timeToSatisfyFAW()); } else if (command == Command::RD || command == Command::RDA) { - lastCommand = state.getLastCommandOnBank(Command::ACT, bank); + lastCommand = lastScheduledByCommandAndBank[Command::ACT][bank]; minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tRCD); - lastCommand = state.getLastCommandOnBank(Command::PDXA, bank); + lastCommand = lastScheduledByCommand[Command::PDXA]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tXP); - lastCommand = state.getLastCommandOnBank(Command::SREFEX, bank); + lastCommand = lastScheduledByCommand[Command::SREFEX]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tXSDLL); - lastCommand = state.getLastCommand(Command::RD); + lastCommand = lastScheduledByCommand[Command::RD]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tCCD); - lastCommand = state.getLastCommand(Command::WR); + lastCommand = lastScheduledByCommand[Command::WR]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tWL + memSpec->tCCD + memSpec->tWTR); - - if (!state.bus.isFree(sc_time_stamp())) - minTimeToWait = max(minTimeToWait, sc_time_stamp() + memSpec->clk); } else if (command == Command::WR || command == Command::WRA) { - lastCommand = state.getLastCommandOnBank(Command::ACT, bank); + lastCommand = lastScheduledByCommandAndBank[Command::ACT][bank]; minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tRCD); -// lastCommand = state.getLastCommand(Command::RD, bank); -// if (lastCommand.isValidCommand()) -// minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tRL + memSpec->tCCD + 2 * memSpec->clk - memSpec->tWL); - -// lastCommand = state.getLastCommand(Command::WR, bank); -// if (lastCommand.isValidCommand()) -// minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tCCD); - - lastCommand = state.getLastCommandOnBank(Command::PDXA, bank); + lastCommand = lastScheduledByCommand[Command::PDXA]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tXP); - lastCommand = state.getLastCommandOnBank(Command::SREFEX, bank); + lastCommand = lastScheduledByCommand[Command::SREFEX]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tXSDLL); - if (!state.bus.isFree(sc_time_stamp())) - minTimeToWait = max(minTimeToWait, sc_time_stamp() + memSpec->clk); - -// for (unsigned bankID = 0; bankID < Configuration::getInstance().memSpec->NumberOfBanks; bankID++) -// { -// lastCommand = state.getLastCommandOnBank(Command::RD, Bank(bankID)); -// if (lastCommand.isValidCommand()) -// minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tRL + memSpec->tCCD + 2 * memSpec->clk - memSpec->tWL); - -// lastCommand = state.getLastCommandOnBank(Command::WR, Bank(bankID)); -// if (lastCommand.isValidCommand()) -// minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tCCD); -// } - - lastCommand = state.getLastCommand(Command::RD); + lastCommand = lastScheduledByCommand[Command::RD]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tRL + memSpec->tCCD + 2 * memSpec->clk - memSpec->tWL); - lastCommand = state.getLastCommand(Command::WR); + lastCommand = lastScheduledByCommand[Command::WR]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tCCD); } else if (command == Command::PRE) { - lastCommand = state.getLastCommandOnBank(Command::ACT, bank); - //if (lastCommand.isValidCommand()) - minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tRAS); + lastCommand = lastScheduledByCommandAndBank[Command::ACT][bank]; + minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tRAS); - lastCommand = state.getLastCommandOnBank(Command::RD, bank); + lastCommand = lastScheduledByCommandAndBank[Command::RD][bank]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tRTP); - lastCommand = state.getLastCommandOnBank(Command::WR, bank); + lastCommand = lastScheduledByCommandAndBank[Command::WR][bank]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tWL + memSpec->tCCD + memSpec->tWR); - lastCommand = state.getLastCommandOnBank(Command::PDXA, bank); + lastCommand = lastScheduledByCommand[Command::PDXA]; if (lastCommand.isValidCommand()) minTimeToWait = max(minTimeToWait, lastCommand.getStart() + memSpec->tXP); - - if (!state.bus.isFree(sc_time_stamp())) - minTimeToWait = max(minTimeToWait, sc_time_stamp() + memSpec->clk); } else { reportFatal("CheckerDDR3New", "Unknown command!"); } + // Check if bus is free + if (lastScheduled.isValidCommand()) + minTimeToWait = max(minTimeToWait, lastScheduled.getStart() + memSpec->clk); + return (minTimeToWait - sc_time_stamp()); } sc_time CheckerDDR3New::timeToSatisfyFAW() { - if (state.lastActivates.size() < 4) + if (lastActivates.size() < 4) return sc_time_stamp(); else { - sc_time earliestTime = state.lastActivates.front() + memSpec->tFAW; + sc_time earliestTime = lastActivates.front() + memSpec->tFAW; if (earliestTime > sc_time_stamp()) return earliestTime; else return sc_time_stamp(); } } + +void CheckerDDR3New::insert(const ScheduledCommand &scheduledCommand) +{ + Command command = scheduledCommand.getCommand(); + printDebugMessage("Changing state on bank " + + to_string(scheduledCommand.getBank().ID()) + + " command is " + commandToString(command)); + + lastScheduledByCommandAndBank[command][scheduledCommand.getBank()] = scheduledCommand; + lastScheduledByCommand[command] = scheduledCommand; + lastScheduled = scheduledCommand; + + // TODO: implement FAW for ACTB + if (command == Command::ACT) + { + if (lastActivates.size() == 4) + lastActivates.pop(); + lastActivates.push(scheduledCommand.getStart()); + } +} + +void CheckerDDR3New::printDebugMessage(std::string message) +{ + DebugManager::getInstance().printDebugMessage("Checker", message); +} diff --git a/DRAMSys/library/src/controller/core/scheduling/checker/CheckerDDR3New.h b/DRAMSys/library/src/controller/core/scheduling/checker/CheckerDDR3New.h index 08c55fe7..81b50295 100644 --- a/DRAMSys/library/src/controller/core/scheduling/checker/CheckerDDR3New.h +++ b/DRAMSys/library/src/controller/core/scheduling/checker/CheckerDDR3New.h @@ -1,16 +1,54 @@ +/* + * Copyright (c) 2019, University of Kaiserslautern + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Lukas Steiner + */ + #ifndef CHECKERDDR3NEW_H #define CHECKERDDR3NEW_H -#include "ICommandChecker.h" +#include +#include +#include +#include "../ScheduledCommand.h" #include "../../configuration/Configuration.h" -#include "../../../ControllerState.h" +#include "../../configuration/MemSpec.h" +#include "../../../Command.h" +#include "../../../../common/dramExtensions.h" //Activate class CheckerDDR3New { public: - CheckerDDR3New(const Configuration &config, - ControllerState &state) : config(config), state(state) + CheckerDDR3New() { memSpec = dynamic_cast(Configuration::getInstance().memSpec); if (memSpec == nullptr) @@ -19,18 +57,23 @@ public: ~CheckerDDR3New() {} sc_time delayToSatisfyConstraints(Command command, Bank bank); + void insert(const ScheduledCommand &scheduledCommand); private: - MemSpecDDR3 *memSpec; + const MemSpecDDR3 *memSpec; - //Activate + std::map> lastScheduledByCommandAndBank; + std::map lastScheduledByCommand; + ScheduledCommand lastScheduled; + + // Four activate window + std::queue lastActivates; sc_time timeToSatisfyFAW(); //PowerDown TODO: Implement this method? //sc_time getTimeConstraintToEnterPowerDown(Command lastCmd, Command pdnCmd) const; - const Configuration &config; - ControllerState &state;//TODO make const + void printDebugMessage(std::string message); }; #endif // CHECKERDDR3NEW_H diff --git a/DRAMSys/library/src/controller/scheduler/SchedulerFifo.cpp b/DRAMSys/library/src/controller/scheduler/SchedulerFifo.cpp index 00055677..626a3541 100644 --- a/DRAMSys/library/src/controller/scheduler/SchedulerFifo.cpp +++ b/DRAMSys/library/src/controller/scheduler/SchedulerFifo.cpp @@ -1,3 +1,37 @@ +/* + * Copyright (c) 2019, University of Kaiserslautern + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Lukas Steiner + */ + #include "SchedulerFifo.h" void SchedulerFifo::storeRequest(tlm_generic_payload *payload) diff --git a/DRAMSys/library/src/controller/scheduler/SchedulerFifo.h b/DRAMSys/library/src/controller/scheduler/SchedulerFifo.h index 24d25b09..f6640d74 100644 --- a/DRAMSys/library/src/controller/scheduler/SchedulerFifo.h +++ b/DRAMSys/library/src/controller/scheduler/SchedulerFifo.h @@ -1,3 +1,37 @@ +/* + * Copyright (c) 2019, University of Kaiserslautern + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Lukas Steiner + */ + #ifndef SCHEDULERFIFO_H #define SCHEDULERFIFO_H diff --git a/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.cpp b/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.cpp index 128a5893..c6cb27ae 100644 --- a/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.cpp +++ b/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.cpp @@ -1,4 +1,39 @@ +/* + * Copyright (c) 2019, University of Kaiserslautern + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Lukas Steiner + */ + #include "SchedulerFrFcfs.h" + #include void SchedulerFrFcfs::storeRequest(tlm_generic_payload *payload) diff --git a/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.h b/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.h index 23869455..819d7b50 100644 --- a/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.h +++ b/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.h @@ -1,3 +1,37 @@ +/* + * Copyright (c) 2019, University of Kaiserslautern + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Lukas Steiner + */ + #ifndef SCHEDULERFRFCFS_H #define SCHEDULERFRFCFS_H diff --git a/DRAMSys/library/src/controller/scheduler/SchedulerIF.h b/DRAMSys/library/src/controller/scheduler/SchedulerIF.h index a4025f6d..d608db9b 100644 --- a/DRAMSys/library/src/controller/scheduler/SchedulerIF.h +++ b/DRAMSys/library/src/controller/scheduler/SchedulerIF.h @@ -1,3 +1,37 @@ +/* + * Copyright (c) 2019, University of Kaiserslautern + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Lukas Steiner + */ + #ifndef SCHEDULERIF_H #define SCHEDULERIF_H