derek/DRAMSys
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minor refactoring

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This commit is contained in:
robert
2014-07-06 10:34:46 +02:00
parent 8467945a3a
commit b8febb434f
21 changed files with 534 additions and 342 deletions
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14
dram/src/controller/core/ControllerCore.cpp
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@@ -91,8 +91,9 @@ void ControllerCore::resetState()
state = savedState;
}
void ControllerCore::triggerRefresh(tlm::tlm_generic_payload& payload, sc_time time)
void ControllerCore::triggerRefresh(tlm::tlm_generic_payload& payload)
{
sc_time time = sc_time_stamp();
Bank bank = DramExtension::getExtension(payload).getBank();
state.cleanUp(time);
@@ -105,9 +106,9 @@ void ControllerCore::triggerRefresh(tlm::tlm_generic_payload& payload, sc_time t
}
}
bool ControllerCore::scheduleRequest(sc_time start, tlm::tlm_generic_payload& payload)
bool ControllerCore::scheduleRequest(tlm::tlm_generic_payload& payload)
{
start = clkAlign(start);
sc_time start = clkAlign(sc_time_stamp());
state.cleanUp(start);
saveState();
@@ -127,8 +128,9 @@ bool ControllerCore::scheduleRequest(sc_time start, tlm::tlm_generic_payload& pa
}
}
bool ControllerCore::bankIsBusy(sc_time time, Bank bank)
bool ControllerCore::bankIsBusy(Bank bank)
{
sc_time time = sc_time_stamp();
ScheduledCommand lastScheduledCommand = state.getLastScheduledCommand(bank);
if (lastScheduledCommand.isNoCommand())
@@ -173,12 +175,12 @@ const std::vector<Bank>& ControllerCore::getBanks()
return banks;
}
std::vector<Bank> ControllerCore::getFreeBanks(sc_time currentTime)
std::vector<Bank> ControllerCore::getFreeBanks()
{
std::vector<Bank> freeBanks;
for(Bank bank: getBanks())
{
if(!bankIsBusy(currentTime, bank))
if(!bankIsBusy(bank))
freeBanks.push_back(bank);
}
return freeBanks;