Refactor Configuration and add warnings when invalid values are provided
This commit is contained in:
@@ -2,7 +2,7 @@
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"simconfig": {
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"AddressOffset": 0,
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"CheckTLM2Protocol": false,
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"DatabaseRecording": true,
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"DatabaseRecording": false,
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"Debug": false,
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"EnableWindowing": false,
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"PowerAnalysis": false,
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@@ -87,164 +87,194 @@ enum sc_time_unit string2TimeUnit(const std::string &s)
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void Configuration::loadSimConfig(const DRAMSys::Config::SimConfig &simConfig)
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{
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if (const auto& _addressOffset = simConfig.AddressOffset)
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addressOffset = *_addressOffset;
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addressOffset = simConfig.AddressOffset.value_or(addressOffset);
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checkTLM2Protocol = simConfig.CheckTLM2Protocol.value_or(checkTLM2Protocol);
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databaseRecording = simConfig.DatabaseRecording.value_or(databaseRecording);
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debug = simConfig.Debug.value_or(debug);
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enableWindowing = simConfig.EnableWindowing.value_or(enableWindowing);
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simulationName = simConfig.SimulationName.value_or(simulationName);
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simulationProgressBar = simConfig.SimulationProgressBar.value_or(simulationProgressBar);
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useMalloc = simConfig.UseMalloc.value_or(useMalloc);
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if (const auto& _checkTLM2Protocol = simConfig.CheckTLM2Protocol)
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checkTLM2Protocol = *_checkTLM2Protocol;
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if (const auto& _databaseRecording = simConfig.DatabaseRecording)
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databaseRecording = *_databaseRecording;
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if (const auto& _debug = simConfig.Debug)
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debug = *_debug;
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if (const auto& _enableWindowing = simConfig.EnableWindowing)
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enableWindowing = *_enableWindowing;
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if (const auto& _powerAnalysis = simConfig.PowerAnalysis)
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{
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powerAnalysis = *_powerAnalysis;
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#ifndef DRAMPOWER
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if (powerAnalysis)
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SC_REPORT_FATAL("Configuration", "Power analysis is only supported with included DRAMPower library!");
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#endif
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}
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if (const auto& _simulationName = simConfig.SimulationName)
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simulationName = *_simulationName;
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if (const auto& _simulationProgressBar = simConfig.SimulationProgressBar)
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simulationProgressBar = *_simulationProgressBar;
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if (const auto& _useMalloc = simConfig.UseMalloc)
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useMalloc = *_useMalloc;
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if (const auto& _windowSize = simConfig.WindowSize)
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windowSize = *_windowSize;
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if (const auto &_storeMode = simConfig.StoreMode)
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storeMode = [=]
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{
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switch (*_storeMode)
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{
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case DRAMSys::Config::StoreModeType::NoStorage:
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return StoreMode::NoStorage;
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case DRAMSys::Config::StoreModeType::Store:
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return StoreMode::Store;
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default:
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SC_REPORT_FATAL("Configuration", "Invalid StoreMode");
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return StoreMode::NoStorage; // Silence Warning
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}
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}();
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windowSize = simConfig.WindowSize.value_or(windowSize);
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if (windowSize == 0)
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SC_REPORT_FATAL("Configuration", "Minimum window size is 1");
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if (const auto& _storeMode = simConfig.StoreMode)
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storeMode = [=] {
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if (_storeMode == DRAMSys::Config::StoreModeType::NoStorage)
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return StoreMode::NoStorage;
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else // (_storeMode == DRAMSys::Config::StoreMode::Store)
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return StoreMode::Store;
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}();
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powerAnalysis = simConfig.PowerAnalysis.value_or(powerAnalysis);
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#ifndef DRAMPOWER
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if (powerAnalysis)
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SC_REPORT_FATAL("Configuration", "Power analysis is only supported with included DRAMPower library!");
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#endif
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}
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void Configuration::loadMCConfig(const DRAMSys::Config::McConfig &mcConfig)
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{
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if (const auto& _pagePolicy = mcConfig.PagePolicy)
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pagePolicy = [=] {
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if (_pagePolicy == DRAMSys::Config::PagePolicyType::Open)
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if (const auto &_pagePolicy = mcConfig.PagePolicy)
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pagePolicy = [=]
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{
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switch (*_pagePolicy)
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{
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case DRAMSys::Config::PagePolicyType::Open:
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return PagePolicy::Open;
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else if (_pagePolicy == DRAMSys::Config::PagePolicyType::OpenAdaptive)
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case DRAMSys::Config::PagePolicyType::OpenAdaptive:
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return PagePolicy::OpenAdaptive;
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else if (_pagePolicy == DRAMSys::Config::PagePolicyType::Closed)
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case DRAMSys::Config::PagePolicyType::Closed:
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return PagePolicy::Closed;
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else
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case DRAMSys::Config::PagePolicyType::ClosedAdaptive:
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return PagePolicy::ClosedAdaptive;
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default:
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SC_REPORT_FATAL("Configuration", "Invalid PagePolicy");
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return PagePolicy::Open; // Silence Warning
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}
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}();
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if (const auto& _scheduler = mcConfig.Scheduler)
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scheduler = [=] {
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if (_scheduler == DRAMSys::Config::SchedulerType::Fifo)
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return Scheduler::Fifo;
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else if (_scheduler == DRAMSys::Config::SchedulerType::FrFcfs)
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return Scheduler::FrFcfs;
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else if (_scheduler == DRAMSys::Config::SchedulerType::FrFcfsGrp)
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return Scheduler::FrFcfsGrp;
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else if (_scheduler == DRAMSys::Config::SchedulerType::GrpFrFcfs)
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return Scheduler::GrpFrFcfs;
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else
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return Scheduler::GrpFrFcfsWm;
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if (const auto &_scheduler = mcConfig.Scheduler)
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scheduler = [=]
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{
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switch (*_scheduler)
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{
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case DRAMSys::Config::SchedulerType::Fifo:
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return Scheduler::Fifo;
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case DRAMSys::Config::SchedulerType::FrFcfs:
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return Scheduler::FrFcfs;
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case DRAMSys::Config::SchedulerType::FrFcfsGrp:
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return Scheduler::FrFcfsGrp;
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case DRAMSys::Config::SchedulerType::GrpFrFcfs:
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return Scheduler::GrpFrFcfs;
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case DRAMSys::Config::SchedulerType::GrpFrFcfsWm:
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return Scheduler::GrpFrFcfsWm;
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default:
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SC_REPORT_FATAL("Configuration", "Invalid Scheduler");
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return Scheduler::Fifo; // Silence Warning
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}
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}();
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if (const auto& _highWatermark = mcConfig.HighWatermark)
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highWatermark = *mcConfig.HighWatermark;
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if (const auto& _lowWatermark = mcConfig.LowWatermark)
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lowWatermark = *mcConfig.LowWatermark;
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if (const auto& _schedulerBuffer = mcConfig.SchedulerBuffer)
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schedulerBuffer = [=] {
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if (_schedulerBuffer == DRAMSys::Config::SchedulerBufferType::Bankwise)
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if (const auto &_schedulerBuffer = mcConfig.SchedulerBuffer)
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schedulerBuffer = [=]
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{
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switch (*_schedulerBuffer)
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{
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case DRAMSys::Config::SchedulerBufferType::Bankwise:
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return SchedulerBuffer::Bankwise;
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else if (_schedulerBuffer == DRAMSys::Config::SchedulerBufferType::ReadWrite)
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case DRAMSys::Config::SchedulerBufferType::ReadWrite:
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return SchedulerBuffer::ReadWrite;
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else
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case DRAMSys::Config::SchedulerBufferType::Shared:
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return SchedulerBuffer::Shared;
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default:
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SC_REPORT_FATAL("Configuration", "Invalid SchedulerBuffer");
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return SchedulerBuffer::Bankwise; // Silence Warning
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}
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}();
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if (const auto& _requestBufferSize = mcConfig.RequestBufferSize)
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requestBufferSize = *mcConfig.RequestBufferSize;
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if (const auto &_cmdMux = mcConfig.CmdMux)
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cmdMux = [=]
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{
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switch (*_cmdMux)
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{
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case DRAMSys::Config::CmdMuxType::Oldest:
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return CmdMux::Oldest;
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case DRAMSys::Config::CmdMuxType::Strict:
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return CmdMux::Strict;
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default:
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SC_REPORT_FATAL("Configuration", "Invalid CmdMux");
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return CmdMux::Oldest; // Silence Warning
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}
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}();
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if (const auto &_respQueue = mcConfig.RespQueue)
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respQueue = [=]
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{
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switch (*_respQueue)
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{
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case DRAMSys::Config::RespQueueType::Fifo:
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return RespQueue::Fifo;
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case DRAMSys::Config::RespQueueType::Reorder:
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return RespQueue::Reorder;
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default:
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SC_REPORT_FATAL("Configuration", "Invalid RespQueue");
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return RespQueue::Fifo; // Silence Warning
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}
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}();
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if (const auto &_refreshPolicy = mcConfig.RefreshPolicy)
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refreshPolicy = [=]
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{
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switch (*_refreshPolicy)
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{
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case DRAMSys::Config::RefreshPolicyType::NoRefresh:
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return RefreshPolicy::NoRefresh;
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case DRAMSys::Config::RefreshPolicyType::AllBank:
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return RefreshPolicy::AllBank;
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case DRAMSys::Config::RefreshPolicyType::PerBank:
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return RefreshPolicy::PerBank;
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case DRAMSys::Config::RefreshPolicyType::Per2Bank:
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return RefreshPolicy::Per2Bank;
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case DRAMSys::Config::RefreshPolicyType::SameBank:
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return RefreshPolicy::SameBank;
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default:
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SC_REPORT_FATAL("Configuration", "Invalid RefreshPolicy");
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return RefreshPolicy::NoRefresh; // Silence Warning
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}
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}();
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if (const auto &_powerDownPolicy = mcConfig.PowerDownPolicy)
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powerDownPolicy = [=]
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{
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switch (*_powerDownPolicy)
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{
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case DRAMSys::Config::PowerDownPolicyType::NoPowerDown:
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return PowerDownPolicy::NoPowerDown;
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case DRAMSys::Config::PowerDownPolicyType::Staggered:
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return PowerDownPolicy::Staggered;
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default:
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SC_REPORT_FATAL("Configuration", "Invalid PowerDownPolicy");
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return PowerDownPolicy::NoPowerDown; // Silence Warning
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}
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}();
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if (const auto &_arbiter = mcConfig.Arbiter)
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arbiter = [=]
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{
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switch (*_arbiter)
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{
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case DRAMSys::Config::ArbiterType::Simple:
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return Arbiter::Simple;
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case DRAMSys::Config::ArbiterType::Fifo:
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return Arbiter::Fifo;
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case DRAMSys::Config::ArbiterType::Reorder:
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return Arbiter::Reorder;
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default:
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SC_REPORT_FATAL("Configuration", "Invalid Arbiter");
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return Arbiter::Simple; // Silence Warning
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}
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}();
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refreshMaxPostponed = mcConfig.RefreshMaxPostponed.value_or(refreshMaxPostponed);
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refreshMaxPulledin = mcConfig.RefreshMaxPulledin.value_or(refreshMaxPulledin);
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highWatermark = mcConfig.HighWatermark.value_or(highWatermark);
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lowWatermark = mcConfig.LowWatermark.value_or(lowWatermark);
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maxActiveTransactions = mcConfig.MaxActiveTransactions.value_or(maxActiveTransactions);
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refreshManagement = mcConfig.RefreshManagement.value_or(refreshManagement);
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requestBufferSize = mcConfig.RequestBufferSize.value_or(requestBufferSize);
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if (requestBufferSize == 0)
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SC_REPORT_FATAL("Configuration", "Minimum request buffer size is 1!");
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if (const auto& _cmdMux = mcConfig.CmdMux)
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cmdMux = [=] {
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if (_cmdMux == DRAMSys::Config::CmdMuxType::Oldest)
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return CmdMux::Oldest;
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else
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return CmdMux::Strict;
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}();
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if (const auto& _respQueue = mcConfig.RespQueue)
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respQueue = [=] {
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if (_respQueue == DRAMSys::Config::RespQueueType::Fifo)
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return RespQueue::Fifo;
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else
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return RespQueue::Reorder;
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}();
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if (const auto& _refreshPolicy = mcConfig.RefreshPolicy)
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refreshPolicy = [=] {
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if (_refreshPolicy == DRAMSys::Config::RefreshPolicyType::NoRefresh)
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return RefreshPolicy::NoRefresh;
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else if (_refreshPolicy == DRAMSys::Config::RefreshPolicyType::AllBank)
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return RefreshPolicy::AllBank;
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else if (_refreshPolicy == DRAMSys::Config::RefreshPolicyType::PerBank)
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return RefreshPolicy::PerBank;
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else if (_refreshPolicy == DRAMSys::Config::RefreshPolicyType::Per2Bank)
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return RefreshPolicy::Per2Bank;
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else // if (policy == DRAMSys::Config::RefreshPolicy::SameBank)
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return RefreshPolicy::SameBank;
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}();
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if (const auto& _refreshMaxPostponed = mcConfig.RefreshMaxPostponed)
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refreshMaxPostponed = *_refreshMaxPostponed;
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if (const auto& _refreshMaxPulledin = mcConfig.RefreshMaxPulledin)
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refreshMaxPulledin = *_refreshMaxPulledin;
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if (const auto& _powerDownPolicy = mcConfig.PowerDownPolicy)
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powerDownPolicy = [=] {
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if (_powerDownPolicy == DRAMSys::Config::PowerDownPolicyType::NoPowerDown)
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return PowerDownPolicy::NoPowerDown;
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else
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return PowerDownPolicy::Staggered;
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}();
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if (const auto& _arbiter = mcConfig.Arbiter)
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arbiter = [=] {
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if (_arbiter == DRAMSys::Config::ArbiterType::Simple)
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return Arbiter::Simple;
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else if (_arbiter == DRAMSys::Config::ArbiterType::Fifo)
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return Arbiter::Fifo;
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else
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return Arbiter::Reorder;
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}();
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if (const auto& _maxActiveTransactions = mcConfig.MaxActiveTransactions)
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maxActiveTransactions = *_maxActiveTransactions;
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if (const auto& _refreshManagement = mcConfig.RefreshManagement)
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refreshManagement = *_refreshManagement;
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if (const auto& _arbitrationDelayFw = mcConfig.ArbitrationDelayFw)
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{
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arbitrationDelayFw = std::round(sc_time(*_arbitrationDelayFw, SC_NS) / memSpec->tCK) * memSpec->tCK;
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