diff --git a/.gitlab-ci_old.yml b/.gitlab-ci_old.yml new file mode 100644 index 00000000..9011e4ab --- /dev/null +++ b/.gitlab-ci_old.yml @@ -0,0 +1,56 @@ +# vim: set ts=4 sw=4 expandtab: +image: gcc + +variables: + GIT_STRATEGY: clone + +stages: + - build + - dramsys-gem5-build + - WIDEIO + - DDR3 + - Coverage + +build: + stage: build + script: + - git submodule sync + - git submodule update --init --recursive + - rm -rf build + - mkdir -p build + - cd build + - cmake ../DRAMSys + - make -j16 + - find . -name "*.o" -type f -delete + - rm -rf ${CI_PROJECT_DIR}/coverage + - mkdir -p ${CI_PROJECT_DIR}/coverage + + cache: + key: build + paths: + - build/ + policy: push + + artifacts: + paths: + - coverage/ + +coverage: + stage: Coverage + coverage: '/Total:\|(\d+\.?\d+\%)/' + script: + # delete all empty files since they produce errors + - find coverage -size 0 -type f -delete + - ls coverage/ -lah + - lcov `find coverage -type f -exec echo "-a {}" \;` -o coverage/final.out + - lcov --list coverage/final.out + + artifacts: + paths: + - coverage/final.out + + +include: + - '/DRAMSys/tests/DDR3/ci.yml' + - '/DRAMSys/tests/WIDEIO/ci.yml' + #- '/DRAMSys/tests/dramsys-gem5/ci.yml' # Should be activated again when a new gitlab runner with right dependencies is used diff --git a/DRAMSys/tests/DDR3/ci.yml b/DRAMSys/tests/DDR3/ci.yml deleted file mode 100644 index a5afa603..00000000 --- a/DRAMSys/tests/DDR3/ci.yml +++ /dev/null @@ -1,83 +0,0 @@ -# Standard DDR3 Test: -example_ddr3: - stage: DDR3 - script: - - export GCOV_PREFIX=$(pwd) - - export GCOV_PREFIX_STRIP=$(pwd | awk -F"/" '{print NF-1}') - - cd build/simulator - - ./DRAMSys ../../DRAMSys/tests/DDR3/simulations/ddr3-example.xml ../../DRAMSys/tests/DDR3/ - - ls -lah - - ls -lah ../../DRAMSys/tests/DDR3/expected/ - - sqldiff ../../DRAMSys/tests/DDR3/expected/ddr3-example_ddr3_ch0.tdb ddr3-example_ddr3_ch0.tdb - - perl -e 'if(`sqldiff ../../DRAMSys/tests/DDR3/expected/ddr3-example_ddr3_ch0.tdb ddr3-example_ddr3_ch0.tdb` eq "") {exit(0)} else {exit(-1)}' - - cd ../traceAnalyzer - - python3 ../../DRAMSys/traceAnalyzer/scripts/tests.py ../simulator/ddr3-example_ddr3_ch0.tdb | if ! grep "failed"; then exit 0; else exit 1; fi - # Run Code Coverage - - lcov -q -c --rc geninfo_adjust_src_path=$GCOV_PREFIX -d ${CI_PROJECT_DIR}/build/ -o ${CI_PROJECT_DIR}/coverage/${CI_JOB_NAME}.out - - cache: - key: build - paths: - - build/ - policy: pull - - artifacts: - paths: - - build/simulator/ddr3-example_ddr3_ch0.tdb - - coverage/${CI_JOB_NAME}.out - expire_in: 2 days - -# Testing Reordering with FR_FCFS Scheduling Algorithm: -fr_fcfs: - stage: DDR3 - script: - - export GCOV_PREFIX=$(pwd) - - export GCOV_PREFIX_STRIP=$(pwd | awk -F"/" '{print NF-1}') - - cd build/simulator - - ./DRAMSys ../../DRAMSys/tests/DDR3/simulations/ddr3-fr_fcfs.xml ../../DRAMSys/tests/DDR3/ - - ls -lah - - ls -lah ../../DRAMSys/tests/DDR3/expected/ - - sqldiff ../../DRAMSys/tests/DDR3/expected/ddr3-fr_fcfs_ddr3_ch0.tdb ddr3-fr_fcfs_ddr3_ch0.tdb - - perl -e 'if(`sqldiff ../../DRAMSys/tests/DDR3/expected/ddr3-fr_fcfs_ddr3_ch0.tdb ddr3-fr_fcfs_ddr3_ch0.tdb` eq "") {exit(0)} else {exit(-1)}' - - cd ../traceAnalyzer - - python3 ../../DRAMSys/traceAnalyzer/scripts/tests.py ../simulator/ddr3-fr_fcfs_ddr3_ch0.tdb | if ! grep "failed"; then exit 0; else exit 1; fi - # Run Code Coverage - - lcov -q -c --rc geninfo_adjust_src_path=$GCOV_PREFIX -d ${CI_PROJECT_DIR}/build/ -o ${CI_PROJECT_DIR}/coverage/${CI_JOB_NAME}.out - - cache: - key: build - paths: - - build/ - policy: pull - - allow_failure: true # TODO should be removed after first tests - - artifacts: - paths: - - build/simulator/ddr3-fr_fcfs_ddr3_ch0.tdb - - coverage/${CI_JOB_NAME}.out - expire_in: 2 days - -# Testing with TLM Protocol Checker -protocol_checker: - stage: DDR3 - script: - - export GCOV_PREFIX=$(pwd) - - export GCOV_PREFIX_STRIP=$(pwd | awk -F"/" '{print NF-1}') - - cd build/simulator - - ./DRAMSys ../../DRAMSys/tests/DDR3/simulations/ddr3-protocol_checker.xml ../../DRAMSys/tests/DDR3/ > output.txt - - echo "TODO" - - ls -lah - # Run Code Coverage - - lcov -q -c --rc geninfo_adjust_src_path=$GCOV_PREFIX -d ${CI_PROJECT_DIR}/build/ -o ${CI_PROJECT_DIR}/coverage/${CI_JOB_NAME}.out - - cache: - key: build - paths: - - build/ - policy: pull - - artifacts: - paths: - - coverage/${CI_JOB_NAME}.out - expire_in: 2 days diff --git a/DRAMSys/tests/DDR3/configs/amconfigs/am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml b/DRAMSys/tests/DDR3/configs/amconfigs/am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml deleted file mode 100644 index b2c3af48..00000000 --- a/DRAMSys/tests/DDR3/configs/amconfigs/am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml +++ /dev/null @@ -1,34 +0,0 @@ - - - 0 - 1 - 2 - 3 - 4 - 5 - 6 - 7 - 8 - 9 - 10 - 11 - 12 - 13 - 14 - 15 - 16 - 17 - 18 - 19 - 20 - 21 - 22 - 23 - 24 - 25 - 26 - 27 - 28 - 29 - - \ No newline at end of file diff --git a/DRAMSys/tests/DDR3/configs/mcconfigs/fifoStrict.xml b/DRAMSys/tests/DDR3/configs/mcconfigs/fifoStrict.xml deleted file mode 100644 index 44bf294e..00000000 --- a/DRAMSys/tests/DDR3/configs/mcconfigs/fifoStrict.xml +++ /dev/null @@ -1,20 +0,0 @@ - - - - - - - - - - - - - - - - - - - - diff --git a/DRAMSys/tests/DDR3/configs/mcconfigs/fr_fcfs.xml b/DRAMSys/tests/DDR3/configs/mcconfigs/fr_fcfs.xml deleted file mode 100644 index 7240485d..00000000 --- a/DRAMSys/tests/DDR3/configs/mcconfigs/fr_fcfs.xml +++ /dev/null @@ -1,20 +0,0 @@ - - - - - - - - - - - - - - - - - - - - diff --git a/DRAMSys/tests/DDR3/configs/memspecs/MICRON_1Gb_DDR3-1600_8bit_G.xml b/DRAMSys/tests/DDR3/configs/memspecs/MICRON_1Gb_DDR3-1600_8bit_G.xml deleted file mode 100644 index 052f6773..00000000 --- a/DRAMSys/tests/DDR3/configs/memspecs/MICRON_1Gb_DDR3-1600_8bit_G.xml +++ /dev/null @@ -1,55 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/DRAMSys/tests/DDR3/configs/simulator/ddr3-protocol_checker.xml b/DRAMSys/tests/DDR3/configs/simulator/ddr3-protocol_checker.xml deleted file mode 100644 index 3efbabe7..00000000 --- a/DRAMSys/tests/DDR3/configs/simulator/ddr3-protocol_checker.xml +++ /dev/null @@ -1,29 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - diff --git a/DRAMSys/tests/DDR3/configs/simulator/ddr3.xml b/DRAMSys/tests/DDR3/configs/simulator/ddr3.xml deleted file mode 100644 index 1613737f..00000000 --- a/DRAMSys/tests/DDR3/configs/simulator/ddr3.xml +++ /dev/null @@ -1,29 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - diff --git a/DRAMSys/tests/DDR3/configs/thermalsim/config.xml b/DRAMSys/tests/DDR3/configs/thermalsim/config.xml deleted file mode 100644 index 4d32315e..00000000 --- a/DRAMSys/tests/DDR3/configs/thermalsim/config.xml +++ /dev/null @@ -1,14 +0,0 @@ - - - - - - - - - - - - - - diff --git a/DRAMSys/tests/DDR3/configs/thermalsim/powerInfo.xml b/DRAMSys/tests/DDR3/configs/thermalsim/powerInfo.xml deleted file mode 100644 index 192cb4ea..00000000 --- a/DRAMSys/tests/DDR3/configs/thermalsim/powerInfo.xml +++ /dev/null @@ -1,8 +0,0 @@ - - - - - - - - diff --git a/DRAMSys/tests/DDR3/simulations/ddr3-example.xml b/DRAMSys/tests/DDR3/simulations/ddr3-example.xml deleted file mode 100644 index c6140385..00000000 --- a/DRAMSys/tests/DDR3/simulations/ddr3-example.xml +++ /dev/null @@ -1,25 +0,0 @@ - - - - - - - - - - - - - - - - - ddr3_example.stl - - diff --git a/DRAMSys/tests/DDR3/simulations/ddr3-fr_fcfs.xml b/DRAMSys/tests/DDR3/simulations/ddr3-fr_fcfs.xml deleted file mode 100644 index a432321b..00000000 --- a/DRAMSys/tests/DDR3/simulations/ddr3-fr_fcfs.xml +++ /dev/null @@ -1,25 +0,0 @@ - - - - - - - - - - - - - - - - - ddr3_example.stl - - diff --git a/DRAMSys/tests/DDR3/simulations/ddr3-protocol_checker.xml b/DRAMSys/tests/DDR3/simulations/ddr3-protocol_checker.xml deleted file mode 100644 index ececf822..00000000 --- a/DRAMSys/tests/DDR3/simulations/ddr3-protocol_checker.xml +++ /dev/null @@ -1,25 +0,0 @@ - - - - - - - - - - - - - - - - - ddr3_example.stl - - diff --git a/DRAMSys/tests/DDR4/ci.yml b/DRAMSys/tests/DDR4/ci.yml new file mode 100644 index 00000000..d6226908 --- /dev/null +++ b/DRAMSys/tests/DDR4/ci.yml @@ -0,0 +1,29 @@ +# DDR4 with 4 bank groups, flexible rankwise refresh and FrFcfs scheduler: +example_ddr4: + stage: DDR4 + script: + - export GCOV_PREFIX=$(pwd) + - export GCOV_PREFIX_STRIP=$(pwd | awk -F"/" '{print NF-1}') + - cd build/simulator + - ./DRAMSys ../../DRAMSys/tests/DDR4/simulations/ddr4-example.json ../../DRAMSys/tests/DDR4/ + - ls -lah + - ls -lah ../../DRAMSys/tests/DDR4/expected/ + - sqldiff ../../DRAMSys/tests/DDR4/expected/ddr4-bankgrp_ddr4_ch0.tdb ddr4-bankgrp_ddr4_ch0.tdb + - perl -e 'if(`sqldiff ../../DRAMSys/tests/DDR4/expected/ddr4-bankgrp_ddr4_ch0.tdb ddr4-bankgrp_ddr4_ch0.tdb` eq "") {exit(0)} else {exit(-1)}' + - cd ../traceAnalyzer + - python3 ../../DRAMSys/traceAnalyzer/scripts/tests.py ../simulator/ddr4-bankgrp_ddr4_ch0.tdb | if ! grep "failed"; then exit 0; else exit 1; fi + # Run Code Coverage + - lcov -q -c --rc geninfo_adjust_src_path=$GCOV_PREFIX -d ${CI_PROJECT_DIR}/build/ -o ${CI_PROJECT_DIR}/coverage/${CI_JOB_NAME}.out + + cache: + key: build + paths: + - build/ + policy: pull + + artifacts: + paths: + - build/simulator/ddr4-bankgrp_ddr4_ch0.tdb + - coverage/${CI_JOB_NAME}.out + expire_in: 2 days + diff --git a/DRAMSys/tests/ddr4_bankgroups/configs/amconfigs/am_ddr4_8x4Gbx8_dimm_p1KB_brc.json b/DRAMSys/tests/DDR4/configs/amconfigs/am_ddr4_8x4Gbx8_dimm_p1KB_brc.json similarity index 100% rename from DRAMSys/tests/ddr4_bankgroups/configs/amconfigs/am_ddr4_8x4Gbx8_dimm_p1KB_brc.json rename to DRAMSys/tests/DDR4/configs/amconfigs/am_ddr4_8x4Gbx8_dimm_p1KB_brc.json diff --git a/DRAMSys/tests/ddr4_bankgroups/configs/mcconfigs/fr_fcfs.json b/DRAMSys/tests/DDR4/configs/mcconfigs/fr_fcfs.json similarity index 100% rename from DRAMSys/tests/ddr4_bankgroups/configs/mcconfigs/fr_fcfs.json rename to DRAMSys/tests/DDR4/configs/mcconfigs/fr_fcfs.json diff --git a/DRAMSys/tests/ddr4_bankgroups/configs/memspecs/MICRON_4Gb_DDR4-1866_8bit_A.json b/DRAMSys/tests/DDR4/configs/memspecs/MICRON_4Gb_DDR4-1866_8bit_A.json similarity index 94% rename from DRAMSys/tests/ddr4_bankgroups/configs/memspecs/MICRON_4Gb_DDR4-1866_8bit_A.json rename to DRAMSys/tests/DDR4/configs/memspecs/MICRON_4Gb_DDR4-1866_8bit_A.json index 11700aaf..abad7eab 100644 --- a/DRAMSys/tests/ddr4_bankgroups/configs/memspecs/MICRON_4Gb_DDR4-1866_8bit_A.json +++ b/DRAMSys/tests/DDR4/configs/memspecs/MICRON_4Gb_DDR4-1866_8bit_A.json @@ -8,7 +8,9 @@ "nbrOfColumns": 1024, "nbrOfRanks": 1, "nbrOfRows": 32768, - "width": 8 + "width": 8, + "NumberOfDevicesOnDIMM": 8, + "NumberOfMemChannels": 1 }, "memoryId": "MICRON_4Gb_DDR4-1866_8bit_A", "memoryType": "DDR4", @@ -63,4 +65,4 @@ "clkMhz": 933 } } -} \ No newline at end of file +} diff --git a/DRAMSys/tests/ddr4_bankgroups/configs/simulator/ddr4.json b/DRAMSys/tests/DDR4/configs/simulator/ddr4.json similarity index 87% rename from DRAMSys/tests/ddr4_bankgroups/configs/simulator/ddr4.json rename to DRAMSys/tests/DDR4/configs/simulator/ddr4.json index 8e62e680..05cd86e2 100644 --- a/DRAMSys/tests/ddr4_bankgroups/configs/simulator/ddr4.json +++ b/DRAMSys/tests/DDR4/configs/simulator/ddr4.json @@ -8,8 +8,6 @@ "EnableWindowing": false, "ErrorCSVFile": "", "ErrorChipSeed": 42, - "NumberOfDevicesOnDIMM": 8, - "NumberOfMemChannels": 1, "PowerAnalysis": false, "SimulationName": "ddr4", "SimulationProgressBar": true, @@ -18,4 +16,4 @@ "UseMalloc": false, "WindowSize": 1000 } -} \ No newline at end of file +} diff --git a/DRAMSys/tests/ddr3_parametersAtMemspec/configs/thermalsim/config.json b/DRAMSys/tests/DDR4/configs/thermalsim/config.json similarity index 100% rename from DRAMSys/tests/ddr3_parametersAtMemspec/configs/thermalsim/config.json rename to DRAMSys/tests/DDR4/configs/thermalsim/config.json diff --git a/DRAMSys/tests/DDR3/configs/thermalsim/core.flp b/DRAMSys/tests/DDR4/configs/thermalsim/core.flp similarity index 100% rename from DRAMSys/tests/DDR3/configs/thermalsim/core.flp rename to DRAMSys/tests/DDR4/configs/thermalsim/core.flp diff --git a/DRAMSys/tests/DDR3/configs/thermalsim/mem.flp b/DRAMSys/tests/DDR4/configs/thermalsim/mem.flp similarity index 100% rename from DRAMSys/tests/DDR3/configs/thermalsim/mem.flp rename to DRAMSys/tests/DDR4/configs/thermalsim/mem.flp diff --git a/DRAMSys/tests/ddr3_parametersAtMemspec/configs/thermalsim/powerInfo.json b/DRAMSys/tests/DDR4/configs/thermalsim/powerInfo.json similarity index 100% rename from DRAMSys/tests/ddr3_parametersAtMemspec/configs/thermalsim/powerInfo.json rename to DRAMSys/tests/DDR4/configs/thermalsim/powerInfo.json diff --git a/DRAMSys/tests/DDR3/configs/thermalsim/stack.stk b/DRAMSys/tests/DDR4/configs/thermalsim/stack.stk similarity index 100% rename from DRAMSys/tests/DDR3/configs/thermalsim/stack.stk rename to DRAMSys/tests/DDR4/configs/thermalsim/stack.stk diff --git a/DRAMSys/tests/DDR3/scripts/createTraceDB.sql b/DRAMSys/tests/DDR4/scripts/createTraceDB.sql similarity index 100% rename from DRAMSys/tests/DDR3/scripts/createTraceDB.sql rename to DRAMSys/tests/DDR4/scripts/createTraceDB.sql diff --git a/DRAMSys/tests/ddr4_bankgroups/simulations/ddr4-example.json b/DRAMSys/tests/DDR4/simulations/ddr4-example.json similarity index 100% rename from DRAMSys/tests/ddr4_bankgroups/simulations/ddr4-example.json rename to DRAMSys/tests/DDR4/simulations/ddr4-example.json diff --git a/DRAMSys/tests/HBM2/ci.yml b/DRAMSys/tests/HBM2/ci.yml new file mode 100644 index 00000000..fb9474a1 --- /dev/null +++ b/DRAMSys/tests/HBM2/ci.yml @@ -0,0 +1,29 @@ +# HBM2 test with 4 bank groups, 2 trace players, fifo strict scheduler and closed pg policy.: +example_HBM2: + stage: HBM2 + script: + - export GCOV_PREFIX=$(pwd) + - export GCOV_PREFIX_STRIP=$(pwd | awk -F"/" '{print NF-1}') + - cd build/simulator + - ./DRAMSys ../../DRAMSys/tests/HBM2/simulations/hbm2-example.json ../../DRAMSys/tests/HBM2/ + - ls -lah + - ls -lah ../../DRAMSys/tests/HBM2/expected/ + - sqldiff ../../DRAMSys/tests/HBM2/expected/hbm2-example_hbm2_ch0.tdb hbm2-example_hbm2_ch0.tdb + - perl -e 'if(`sqldiff ../../DRAMSys/tests/HBM2/expected/hbm2-example_hbm2_ch0.tdb hbm2-example_hbm2_ch0.tdb` eq "") {exit(0)} else {exit(-1)}' + - cd ../traceAnalyzer + - python3 ../../DRAMSys/traceAnalyzer/scripts/tests.py ../simulator/hbm2-example_hbm2_ch0.tdb | if ! grep "failed"; then exit 0; else exit 1; fi + # Run Code Coverage + - lcov -q -c --rc geninfo_adjust_src_path=$GCOV_PREFIX -d ${CI_PROJECT_DIR}/build/ -o ${CI_PROJECT_DIR}/coverage/${CI_JOB_NAME}.out + + cache: + key: build + paths: + - build/ + policy: pull + + artifacts: + paths: + - build/simulator/hbm2-example_hbm2_ch0.tdb + - coverage/${CI_JOB_NAME}.out + expire_in: 2 days + diff --git a/DRAMSys/tests/HBM2/configs/memspecs/HBM2.json b/DRAMSys/tests/HBM2/configs/memspecs/HBM2.json index efa8ee9e..b5985d10 100644 --- a/DRAMSys/tests/HBM2/configs/memspecs/HBM2.json +++ b/DRAMSys/tests/HBM2/configs/memspecs/HBM2.json @@ -8,7 +8,9 @@ "nbrOfColumns": 128, "nbrOfRanks": 2, "nbrOfRows": 32768, - "width": 64 + "width": 64, + "NumberOfDevicesOnDIMM": 1, + "NumberOfMemChannels": 1 }, "memoryId": "https://www.computerbase.de/2019-05/amd-memory-tweak-vram-oc/#bilder", "memoryType": "HBM2", @@ -43,4 +45,4 @@ "clkMhz": 1000 } } -} \ No newline at end of file +} diff --git a/DRAMSys/tests/HBM2/configs/simulator/hbm2.json b/DRAMSys/tests/HBM2/configs/simulator/hbm2.json index 9589611f..608aec41 100644 --- a/DRAMSys/tests/HBM2/configs/simulator/hbm2.json +++ b/DRAMSys/tests/HBM2/configs/simulator/hbm2.json @@ -8,8 +8,6 @@ "EnableWindowing": false, "ErrorCSVFile": "", "ErrorChipSeed": 42, - "NumberOfDevicesOnDIMM": 1, - "NumberOfMemChannels": 1, "PowerAnalysis": false, "SimulationName": "hbm2", "SimulationProgressBar": true, @@ -18,4 +16,4 @@ "UseMalloc": false, "WindowSize": 1000 } -} \ No newline at end of file +} diff --git a/DRAMSys/tests/WIDEIO/ci.yml b/DRAMSys/tests/WIDEIO/ci.yml deleted file mode 100644 index e04215e0..00000000 --- a/DRAMSys/tests/WIDEIO/ci.yml +++ /dev/null @@ -1,40 +0,0 @@ -# vim: set ts=4 sw=4 expandtab: -example_wideio: - stage: WIDEIO - script: - - export GCOV_PREFIX=$(pwd) - - export GCOV_PREFIX_STRIP=$(pwd | awk -F"/" '{print NF-1}') - # Generate specific traces for WIDEIO: - - cd DRAMSys/tests/WIDEIO/traces/ - - perl generator.pl - - cd - - # Run DRAMSys - - cd build/simulator - - ./DRAMSys ../../DRAMSys/tests/WIDEIO/simulations/wideio-example.xml ../../DRAMSys/tests/WIDEIO/ - - ls - # Run Traceanalyzer testing scripts: - - cd ../traceAnalyzer - - python3 ../../DRAMSys/traceAnalyzer/scripts/tests.py ../simulator/wideio-example_wideio_ch0.tdb | if ! grep "failed"; then exit 0; else exit 1; fi - - python3 ../../DRAMSys/traceAnalyzer/scripts/tests.py ../simulator/wideio-example_wideio_ch1.tdb | if ! grep "failed"; then exit 0; else exit 1; fi - - python3 ../../DRAMSys/traceAnalyzer/scripts/tests.py ../simulator/wideio-example_wideio_ch2.tdb | if ! grep "failed"; then exit 0; else exit 1; fi - - python3 ../../DRAMSys/traceAnalyzer/scripts/tests.py ../simulator/wideio-example_wideio_ch3.tdb | if ! grep "failed"; then exit 0; else exit 1; fi - # Run Code Coverage - - lcov -q -c --rc geninfo_adjust_src_path=$GCOV_PREFIX -d ${CI_PROJECT_DIR}/build/ -o ${CI_PROJECT_DIR}/coverage/${CI_JOB_NAME}.out - - cache: - key: build - paths: - - build/ - policy: pull - - allow_failure: true # TODO: should be removed once the problems are fixed! - - artifacts: - paths: - - build/simulator/wideio-example_wideio_ch0.tdb - - build/simulator/wideio-example_wideio_ch1.tdb - - build/simulator/wideio-example_wideio_ch2.tdb - - build/simulator/wideio-example_wideio_ch3.tdb - - coverage/${CI_JOB_NAME}.out - expire_in: 2 days - diff --git a/DRAMSys/tests/WIDEIO/configs/amconfigs/am_wideio_brc.xml b/DRAMSys/tests/WIDEIO/configs/amconfigs/am_wideio_brc.xml deleted file mode 100755 index c6a33e71..00000000 --- a/DRAMSys/tests/WIDEIO/configs/amconfigs/am_wideio_brc.xml +++ /dev/null @@ -1,8 +0,0 @@ - - - - - - - - diff --git a/DRAMSys/tests/WIDEIO/configs/amconfigs/am_wideio_rbc.xml b/DRAMSys/tests/WIDEIO/configs/amconfigs/am_wideio_rbc.xml deleted file mode 100755 index 511a7f0a..00000000 --- a/DRAMSys/tests/WIDEIO/configs/amconfigs/am_wideio_rbc.xml +++ /dev/null @@ -1,8 +0,0 @@ - - - - - - - - diff --git a/DRAMSys/tests/WIDEIO/configs/mcconfigs/fifoStrict.xml b/DRAMSys/tests/WIDEIO/configs/mcconfigs/fifoStrict.xml deleted file mode 100644 index ed869b57..00000000 --- a/DRAMSys/tests/WIDEIO/configs/mcconfigs/fifoStrict.xml +++ /dev/null @@ -1,50 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/DRAMSys/tests/WIDEIO/configs/memspecs/wideio.xml b/DRAMSys/tests/WIDEIO/configs/memspecs/wideio.xml deleted file mode 100644 index fbe252d6..00000000 --- a/DRAMSys/tests/WIDEIO/configs/memspecs/wideio.xml +++ /dev/null @@ -1,61 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/DRAMSys/tests/WIDEIO/configs/simulator/wideio.xml b/DRAMSys/tests/WIDEIO/configs/simulator/wideio.xml deleted file mode 100644 index acd95599..00000000 --- a/DRAMSys/tests/WIDEIO/configs/simulator/wideio.xml +++ /dev/null @@ -1,24 +0,0 @@ - - - - - - - - - - - - - - - - - - - - diff --git a/DRAMSys/tests/WIDEIO/configs/thermalsim/config.xml b/DRAMSys/tests/WIDEIO/configs/thermalsim/config.xml deleted file mode 100644 index 4d32315e..00000000 --- a/DRAMSys/tests/WIDEIO/configs/thermalsim/config.xml +++ /dev/null @@ -1,14 +0,0 @@ - - - - - - - - - - - - - - diff --git a/DRAMSys/tests/WIDEIO/configs/thermalsim/core.flp b/DRAMSys/tests/WIDEIO/configs/thermalsim/core.flp deleted file mode 100755 index e85e6801..00000000 --- a/DRAMSys/tests/WIDEIO/configs/thermalsim/core.flp +++ /dev/null @@ -1,45 +0,0 @@ -CPUs : - - position 0, 0 ; - dimension 2750, 4300 ; - -GPU : - - position 3350, 0 ; - dimension 2750, 4000 ; - -BASEBAND1 : - - position 4250, 4000 ; - dimension 1850, 3300 ; - -BASEBAND2 : - - position 3350, 7300 ; - dimension 2750, 3300 ; - -LLCACHE : - - position 0, 4300 ; - dimension 1900, 3000 ; - -DRAMCTRL1 : - - position 1900, 4300 ; - dimension 850, 3000 ; - -DRAMCTRL2 : - - position 3350, 4000 ; - dimension 900, 3300 ; - -TSVS : - - position 2750, 2300 ; - dimension 600, 6000 ; - -ACELLERATORS : - - position 0, 7300 ; - dimension 2750, 3300 ; - diff --git a/DRAMSys/tests/WIDEIO/configs/thermalsim/mem.flp b/DRAMSys/tests/WIDEIO/configs/thermalsim/mem.flp deleted file mode 100755 index 29d02254..00000000 --- a/DRAMSys/tests/WIDEIO/configs/thermalsim/mem.flp +++ /dev/null @@ -1,16 +0,0 @@ -channel0 : - position 150, 100 ; - dimension 2600, 5200 ; - -channel1 : - position 3350, 100 ; - dimension 2600, 5200 ; - -channel2 : - position 150, 5300 ; - dimension 2600, 5200 ; - -channel3 : - position 3350, 5300 ; - dimension 2600, 5200 ; - diff --git a/DRAMSys/tests/WIDEIO/configs/thermalsim/powerInfo.xml b/DRAMSys/tests/WIDEIO/configs/thermalsim/powerInfo.xml deleted file mode 100644 index 192cb4ea..00000000 --- a/DRAMSys/tests/WIDEIO/configs/thermalsim/powerInfo.xml +++ /dev/null @@ -1,8 +0,0 @@ - - - - - - - - diff --git a/DRAMSys/tests/WIDEIO/configs/thermalsim/stack.stk b/DRAMSys/tests/WIDEIO/configs/thermalsim/stack.stk deleted file mode 100755 index ec74f020..00000000 --- a/DRAMSys/tests/WIDEIO/configs/thermalsim/stack.stk +++ /dev/null @@ -1,49 +0,0 @@ -material SILICON : - thermal conductivity 1.30e-4 ; - volumetric heat capacity 1.628e-12 ; - -material BEOL : - thermal conductivity 2.25e-6 ; - volumetric heat capacity 2.175e-12 ; - -material COPPER : - thermal conductivity 4.01e-04 ; - volumetric heat capacity 3.37e-12 ; - -top heat sink : - //sink height 1e03, area 100e06, material COPPER ; - //spreader height 0.5e03, area 70e06, material SILICON ; - heat transfer coefficient 1.3e-09 ; - temperature 318.15 ; -dimensions : - chip length 6100, width 10600 ; - cell length 100, width 100 ; - - -layer PCB : - height 10 ; - material BEOL ; - -die DRAM : - layer 58.5 SILICON ; - source 2 SILICON ; - layer 1.5 BEOL ; - layer 58.5 SILICON ; - - -stack: - die DRAM_DIE DRAM floorplan "./mem.flp" ; - layer CONN_TO_PCB PCB ; - -solver: - transient step 0.01, slot 0.05 ; - initial temperature 300.0 ; - -output: - Tflpel(DRAM_DIE.channel0 , "temp_flp_element_ch0.txt" , average , slot ); - Tflpel(DRAM_DIE.channel1 , "temp_flp_element_ch1.txt" , average , slot ); - Tflpel(DRAM_DIE.channel2 , "temp_flp_element_ch2.txt" , average , slot ); - Tflpel(DRAM_DIE.channel3 , "temp_flp_element_ch3.txt" , average , slot ); - Tmap (DRAM_DIE, "output1.txt", slot) ; - Pmap (DRAM_DIE, "output2.txt", slot) ; - diff --git a/DRAMSys/tests/WIDEIO/scripts/createTraceDB.sql b/DRAMSys/tests/WIDEIO/scripts/createTraceDB.sql deleted file mode 100644 index 7a127fac..00000000 --- a/DRAMSys/tests/WIDEIO/scripts/createTraceDB.sql +++ /dev/null @@ -1,94 +0,0 @@ -DROP TABLE IF EXISTS Phases; -DROP TABLE IF EXISTS GeneralInfo; -DROP TABLE IF EXISTS CommandLengths; -DROP TABLE IF EXISTS Comments; -DROP TABLE IF EXISTS ranges; -DROP TABLE IF EXISTS Transactions; -DROP TABLE IF EXISTS DebugMessages; -DROP TABLE IF EXISTS Power; - -CREATE TABLE Phases( - ID INTEGER PRIMARY KEY, - PhaseName TEXT, - PhaseBegin INTEGER, - PhaseEnd INTEGER, - Transact INTEGER -); - -CREATE TABLE GeneralInfo( - NumberOfTransactions INTEGER, - TraceEnd INTEGER, - NumberOfRanks INTEGER, - NumberOfBanks INTEGER, - clk INTEGER, - UnitOfTime TEXT, - MCconfig TEXT, - Memspec TEXT, - Traces TEXT, - WindowSize INTEGER, - FlexibleRefresh INTEGER, - MaxRefBurst INTEGER, - ControllerThread INTEGER -); - -CREATE TABLE CommandLengths( - ACT INTEGER, - PRE INTEGER, - PREA INTEGER, - RD INTEGER, - RDA INTEGER, - WR INTEGER, - WRA INTEGER, - REFA INTEGER, - REFB INTEGER, - PDEA INTEGER, - PDXA INTEGER, - PDEP INTEGER, - PDXP INTEGER, - SREFEN INTEGER, - SREFEX INTEGER -); - -CREATE TABLE Power( - time DOUBLE, - AveragePower DOUBLE -); - - -CREATE TABLE Comments( - Time INTEGER, - Text TEXT -); - -CREATE TABLE DebugMessages( - Time INTEGER, - Message TEXT -); - --- use SQLITE R* TREE Module to make queries on timespans effecient (see http://www.sqlite.org/rtree.html) -CREATE VIRTUAL TABLE ranges USING rtree( - id, - begin, end -); - -CREATE TABLE Transactions( - ID INTEGER, - Range INTEGER, - Address INTEGER, - Burstlength INTEGER, - TThread INTEGER, - TChannel INTEGER, - TRank INTEGER, - TBankgroup INTEGER, - TBank INTEGER, - TRow INTEGER, - TColumn INTEGER, - DataStrobeBegin INTEGER, - DataStrobeEnd INTEGER, - TimeOfGeneration INTEGER, - Command TEXT - ); - -CREATE INDEX ranges_index ON Transactions(Range); -CREATE INDEX "phasesTransactions" ON "Phases" ("Transact" ASC); -CREATE INDEX "messageTimes" ON "DebugMessages" ("Time" ASC); diff --git a/DRAMSys/tests/WIDEIO/simulations/wideio-example.xml b/DRAMSys/tests/WIDEIO/simulations/wideio-example.xml deleted file mode 100644 index fea1f568..00000000 --- a/DRAMSys/tests/WIDEIO/simulations/wideio-example.xml +++ /dev/null @@ -1,24 +0,0 @@ - - - - - - - - - - - - - - - - - wideio.stl - - diff --git a/DRAMSys/tests/WIDEIO/traces/generator.pl b/DRAMSys/tests/WIDEIO/traces/generator.pl deleted file mode 100644 index 173a0248..00000000 --- a/DRAMSys/tests/WIDEIO/traces/generator.pl +++ /dev/null @@ -1,75 +0,0 @@ -#!/usr/bin/perl -w -use warnings; -use strict; - -# Width: 128 bit -# -# Mapping: -# 28 | 27 26 25 24 | 23 22 21 20 | 19 18 17 16 | 15 14 13 12 | 11 10 9 8 | 7 6 5 4 | 3 2 1 0 -# H | H B B B | R R R R | R R R R | R R R R | R C C C | C C C C | Y Y Y Y - - -open(OUT, "> wideio.stl"); - -my $length = 100000; -my $size = 0x10; -my $channelOffset = 0x8000000; -my $state = 0; -# state 0: reads only linear -# state 1: reads only random -# state 2: read and writes linear - -for(my $i=0; $i < $length; $i += 4) -{ - my $r = 0; - - if($state == 0) - { - print OUT ($i+0).": read ".sprintf("0x%x",($size*$i)+0*$channelOffset)."\n"; - print OUT ($i+1).": read ".sprintf("0x%x",($size*$i)+1*$channelOffset)."\n"; - print OUT ($i+2).": read ".sprintf("0x%x",($size*$i)+2*$channelOffset)."\n"; - print OUT ($i+3).": read ".sprintf("0x%x",($size*$i)+3*$channelOffset)."\n"; - } - elsif($state == 1) - { - $r = int(rand($channelOffset)); - print OUT ($i+0).": read ".sprintf("0x%x",($size*$r)+0*$channelOffset)."\n"; - $r = int(rand($channelOffset)); - print OUT ($i+1).": read ".sprintf("0x%x",($size*$r)+1*$channelOffset)."\n"; - $r = int(rand($channelOffset)); - print OUT ($i+2).": read ".sprintf("0x%x",($size*$r)+2*$channelOffset)."\n"; - $r = int(rand($channelOffset)); - print OUT ($i+3).": read ".sprintf("0x%x",($size*$r)+3*$channelOffset)."\n"; - } - elsif($state == 2) - { - my $rw = int(rand(2))%2; - if($rw == 0) - { - print OUT "$i: read ".sprintf("0x%x",($size*$i)+0*$channelOffset)."\n"; - print OUT "$i: read ".sprintf("0x%x",($size*$i)+1*$channelOffset)."\n"; - print OUT "$i: read ".sprintf("0x%x",($size*$i)+2*$channelOffset)."\n"; - print OUT "$i: read ".sprintf("0x%x",($size*$i)+3*$channelOffset)."\n"; - } - else - { - print OUT "$i: write ".sprintf("0x%x",($size*$i)+0*$channelOffset)."\n"; - print OUT "$i: write ".sprintf("0x%x",($size*$i)+1*$channelOffset)."\n"; - print OUT "$i: write ".sprintf("0x%x",($size*$i)+2*$channelOffset)."\n"; - print OUT "$i: write ".sprintf("0x%x",($size*$i)+3*$channelOffset)."\n"; - } - } - else - { - print "Error generating traces (".$state.")"; - exit(-1); - } - - if(($i != 0) && (($i % 1000) == 0)) - { - # GOTO next state every 1000st request: - $state = ($state + 1) % 3; - } -} - -close(OUT); diff --git a/DRAMSys/tests/ddr3_multirank/ci.yml b/DRAMSys/tests/ddr3_multirank/ci.yml new file mode 100644 index 00000000..da90393a --- /dev/null +++ b/DRAMSys/tests/ddr3_multirank/ci.yml @@ -0,0 +1,29 @@ +# DDR3 Dual Rank Test with Staggered Power Down Policy and Scheduler FrFcfsGrp +example_ddr3: + stage: DDR3 + script: + - export GCOV_PREFIX=$(pwd) + - export GCOV_PREFIX_STRIP=$(pwd | awk -F"/" '{print NF-1}') + - cd build/simulator + - ./DRAMSys ../../DRAMSys/tests/ddr3_multirank/ddr3-example.json ../../DRAMSys/tests/ddr3_multirank/ + - ls -lah + - ls -lah ../../DRAMSys/tests/ddr3_multirank/expected/ + - sqldiff ../../DRAMSys/tests/ddr3_multirank/expected/ddr3-dual-rank_ddr3_ch0.tdb ddr3-dual-rank_ddr3_ch0.tdb + - perl -e 'if(`sqldiff ../../DRAMSys/tests/ddr3_multirank/expected/ddr3-dual-rank_ddr3_ch0.tdb ddr3-dual-rank_ddr3_ch0.tdb` eq "") {exit(0)} else {exit(-1)}' + - cd ../traceAnalyzer + - python3 ../../DRAMSys/traceAnalyzer/scripts/tests.py ../simulator/ddr3_multirank_ddr3_ch0.tdb | if ! grep "failed"; then exit 0; else exit 1; fi + # Run Code Coverage + - lcov -q -c --rc geninfo_adjust_src_path=$GCOV_PREFIX -d ${CI_PROJECT_DIR}/build/ -o ${CI_PROJECT_DIR}/coverage/${CI_JOB_NAME}.out + + cache: + key: build + paths: + - build/ + policy: pull + + artifacts: + paths: + - build/simulator/ddr3_multirank_ddr3_ch0.tdb + - coverage/${CI_JOB_NAME}.out + expire_in: 2 days + diff --git a/DRAMSys/tests/ddr3_multirank/configs/memspecs/MICRON_2GB_DDR3-1066_64bit_D_SODIMM.json b/DRAMSys/tests/ddr3_multirank/configs/memspecs/MICRON_2GB_DDR3-1066_64bit_D_SODIMM.json index 13d9fef5..d842bda2 100644 --- a/DRAMSys/tests/ddr3_multirank/configs/memspecs/MICRON_2GB_DDR3-1066_64bit_D_SODIMM.json +++ b/DRAMSys/tests/ddr3_multirank/configs/memspecs/MICRON_2GB_DDR3-1066_64bit_D_SODIMM.json @@ -7,7 +7,9 @@ "nbrOfColumns": 1024, "nbrOfRanks": 2, "nbrOfRows": 16384, - "width": 8 + "width": 8, + "NumberOfDevicesOnDIMM": 8, + "NumberOfMemChannels": 1 }, "memoryId": "MICRON_2GB_DDR3-1066_64bit_D_SODIMM", "memoryType": "DDR3", @@ -49,7 +51,12 @@ "XPDLL": 13, "XS": 64, "XSDLL": 512, - "clkMhz": 533 + "clkMhz": 533, + + "ACTPDEN": 1, + "PRPDEN": 1, + "REFPDEN": 1, + "RTRS": 1 } } } diff --git a/DRAMSys/tests/ddr3_multirank/configs/simulator/ddr3.json b/DRAMSys/tests/ddr3_multirank/configs/simulator/ddr3.json index 4e9faadc..99ccdb45 100644 --- a/DRAMSys/tests/ddr3_multirank/configs/simulator/ddr3.json +++ b/DRAMSys/tests/ddr3_multirank/configs/simulator/ddr3.json @@ -8,8 +8,6 @@ "EnableWindowing": false, "ErrorCSVFile": "", "ErrorChipSeed": 42, - "NumberOfDevicesOnDIMM": 8, - "NumberOfMemChannels": 1, "PowerAnalysis": false, "SimulationName": "ddr3", "SimulationProgressBar": true, diff --git a/DRAMSys/tests/ddr3_multirank/simulations/ddr3-example.json b/DRAMSys/tests/ddr3_multirank/simulations/ddr3-example.json index e3d4a4c3..b924da62 100644 --- a/DRAMSys/tests/ddr3_multirank/simulations/ddr3-example.json +++ b/DRAMSys/tests/ddr3_multirank/simulations/ddr3-example.json @@ -4,7 +4,7 @@ "mcconfig": "fr_fcfs_grp.json", "memspec": "MICRON_2GB_DDR3-1066_64bit_D_SODIMM.json", "simconfig": "ddr3.json", - "simulationid": "ddr3-example-dual-rank-json", + "simulationid": "ddr3-dual-rank", "thermalconfig": "config.json", "tracesetup": [ { diff --git a/DRAMSys/tests/ddr3_parametersAtMemspec/configs/amconfigs/am_ddr3_8x2Gbx8_dimm_p1KB_dual_rank_rbc.json b/DRAMSys/tests/ddr3_parametersAtMemspec/configs/amconfigs/am_ddr3_8x2Gbx8_dimm_p1KB_dual_rank_rbc.json deleted file mode 100644 index c82926c9..00000000 --- a/DRAMSys/tests/ddr3_parametersAtMemspec/configs/amconfigs/am_ddr3_8x2Gbx8_dimm_p1KB_dual_rank_rbc.json +++ /dev/null @@ -1,51 +0,0 @@ -{ - "CONGEN": { - "XOR":[ - { - "FIRST":13, - "SECOND":16 - } - ], - "BANK_BIT": [ - 13, - 14, - 15 - ], - "BYTE_BIT": [ - 0, - 1, - 2 - ], - "COLUMN_BIT": [ - 3, - 4, - 5, - 6, - 7, - 8, - 9, - 10, - 11, - 12 - ], - "ROW_BIT": [ - 16, - 17, - 18, - 19, - 20, - 21, - 22, - 23, - 24, - 25, - 26, - 27, - 28, - 29 - ], - "RANK_BIT": [ - 30 - ] - } -} diff --git a/DRAMSys/tests/ddr3_parametersAtMemspec/configs/mcconfigs/fr_fcfs_grp.json b/DRAMSys/tests/ddr3_parametersAtMemspec/configs/mcconfigs/fr_fcfs_grp.json deleted file mode 100644 index 4ac02e30..00000000 --- a/DRAMSys/tests/ddr3_parametersAtMemspec/configs/mcconfigs/fr_fcfs_grp.json +++ /dev/null @@ -1,12 +0,0 @@ -{"mcconfig": - {"PagePolicy": "Open", - "Scheduler": "FrFcfsGrp", - "RequestBufferSize": 8, - "CmdMux": "Oldest", - "RespQueue": "Fifo", - "RefreshPolicy": "Rankwise", - "RefreshMode": 1, - "RefreshMaxPostponed": 0, - "RefreshMaxPulledin": 0, - "PowerDownPolicy": "Staggered", - "PowerDownTimeout": 100}} diff --git a/DRAMSys/tests/ddr3_parametersAtMemspec/configs/memspecs/MICRON_2GB_DDR3-1066_64bit_D_SODIMM.json b/DRAMSys/tests/ddr3_parametersAtMemspec/configs/memspecs/MICRON_2GB_DDR3-1066_64bit_D_SODIMM.json deleted file mode 100644 index d842bda2..00000000 --- a/DRAMSys/tests/ddr3_parametersAtMemspec/configs/memspecs/MICRON_2GB_DDR3-1066_64bit_D_SODIMM.json +++ /dev/null @@ -1,62 +0,0 @@ -{ - "memspec": { - "memarchitecturespec": { - "burstLength": 8, - "dataRate": 2, - "nbrOfBanks": 8, - "nbrOfColumns": 1024, - "nbrOfRanks": 2, - "nbrOfRows": 16384, - "width": 8, - "NumberOfDevicesOnDIMM": 8, - "NumberOfMemChannels": 1 - }, - "memoryId": "MICRON_2GB_DDR3-1066_64bit_D_SODIMM", - "memoryType": "DDR3", - "mempowerspec": { - "idd0": 720.0, - "idd2n": 400.0, - "idd2p0": 80.0, - "idd2p1": 200.0, - "idd3n": 440.0, - "idd3p0": 240.0, - "idd3p1": 240.0, - "idd4r": 1200.0, - "idd4w": 1200.0, - "idd5": 1760.0, - "idd6": 48.0, - "vdd": 1.5 - }, - "memtimingspec": { - "AL": 0, - "CCD": 4, - "CKE": 3, - "CKESR": 4, - "CL": 7, - "DQSCK": 0, - "FAW": 20, - "RAS": 20, - "RC": 27, - "RCD": 7, - "REFI": 4160, - "RFC": 59, - "RL": 7, - "RP": 7, - "RRD": 4, - "RTP": 4, - "WL": 6, - "WR": 8, - "WTR": 4, - "XP": 4, - "XPDLL": 13, - "XS": 64, - "XSDLL": 512, - "clkMhz": 533, - - "ACTPDEN": 1, - "PRPDEN": 1, - "REFPDEN": 1, - "RTRS": 1 - } - } -} diff --git a/DRAMSys/tests/ddr3_parametersAtMemspec/configs/simulator/ddr3.json b/DRAMSys/tests/ddr3_parametersAtMemspec/configs/simulator/ddr3.json deleted file mode 100644 index 99ccdb45..00000000 --- a/DRAMSys/tests/ddr3_parametersAtMemspec/configs/simulator/ddr3.json +++ /dev/null @@ -1,19 +0,0 @@ -{ - "simconfig": { - "AddressOffset": 0, - "CheckTLM2Protocol": false, - "DatabaseRecording": true, - "Debug": false, - "ECCControllerMode": "Disabled", - "EnableWindowing": false, - "ErrorCSVFile": "", - "ErrorChipSeed": 42, - "PowerAnalysis": false, - "SimulationName": "ddr3", - "SimulationProgressBar": true, - "StoreMode": "NoStorage", - "ThermalSimulation": false, - "UseMalloc": false, - "WindowSize": 1000 - } -} diff --git a/DRAMSys/tests/ddr3_parametersAtMemspec/configs/thermalsim/core.flp b/DRAMSys/tests/ddr3_parametersAtMemspec/configs/thermalsim/core.flp deleted file mode 100755 index e85e6801..00000000 --- a/DRAMSys/tests/ddr3_parametersAtMemspec/configs/thermalsim/core.flp +++ /dev/null @@ -1,45 +0,0 @@ -CPUs : - - position 0, 0 ; - dimension 2750, 4300 ; - -GPU : - - position 3350, 0 ; - dimension 2750, 4000 ; - -BASEBAND1 : - - position 4250, 4000 ; - dimension 1850, 3300 ; - -BASEBAND2 : - - position 3350, 7300 ; - dimension 2750, 3300 ; - -LLCACHE : - - position 0, 4300 ; - dimension 1900, 3000 ; - -DRAMCTRL1 : - - position 1900, 4300 ; - dimension 850, 3000 ; - -DRAMCTRL2 : - - position 3350, 4000 ; - dimension 900, 3300 ; - -TSVS : - - position 2750, 2300 ; - dimension 600, 6000 ; - -ACELLERATORS : - - position 0, 7300 ; - dimension 2750, 3300 ; - diff --git a/DRAMSys/tests/ddr3_parametersAtMemspec/configs/thermalsim/mem.flp b/DRAMSys/tests/ddr3_parametersAtMemspec/configs/thermalsim/mem.flp deleted file mode 100755 index 29d02254..00000000 --- a/DRAMSys/tests/ddr3_parametersAtMemspec/configs/thermalsim/mem.flp +++ /dev/null @@ -1,16 +0,0 @@ -channel0 : - position 150, 100 ; - dimension 2600, 5200 ; - -channel1 : - position 3350, 100 ; - dimension 2600, 5200 ; - -channel2 : - position 150, 5300 ; - dimension 2600, 5200 ; - -channel3 : - position 3350, 5300 ; - dimension 2600, 5200 ; - diff --git a/DRAMSys/tests/ddr3_parametersAtMemspec/configs/thermalsim/stack.stk b/DRAMSys/tests/ddr3_parametersAtMemspec/configs/thermalsim/stack.stk deleted file mode 100755 index ec74f020..00000000 --- a/DRAMSys/tests/ddr3_parametersAtMemspec/configs/thermalsim/stack.stk +++ /dev/null @@ -1,49 +0,0 @@ -material SILICON : - thermal conductivity 1.30e-4 ; - volumetric heat capacity 1.628e-12 ; - -material BEOL : - thermal conductivity 2.25e-6 ; - volumetric heat capacity 2.175e-12 ; - -material COPPER : - thermal conductivity 4.01e-04 ; - volumetric heat capacity 3.37e-12 ; - -top heat sink : - //sink height 1e03, area 100e06, material COPPER ; - //spreader height 0.5e03, area 70e06, material SILICON ; - heat transfer coefficient 1.3e-09 ; - temperature 318.15 ; -dimensions : - chip length 6100, width 10600 ; - cell length 100, width 100 ; - - -layer PCB : - height 10 ; - material BEOL ; - -die DRAM : - layer 58.5 SILICON ; - source 2 SILICON ; - layer 1.5 BEOL ; - layer 58.5 SILICON ; - - -stack: - die DRAM_DIE DRAM floorplan "./mem.flp" ; - layer CONN_TO_PCB PCB ; - -solver: - transient step 0.01, slot 0.05 ; - initial temperature 300.0 ; - -output: - Tflpel(DRAM_DIE.channel0 , "temp_flp_element_ch0.txt" , average , slot ); - Tflpel(DRAM_DIE.channel1 , "temp_flp_element_ch1.txt" , average , slot ); - Tflpel(DRAM_DIE.channel2 , "temp_flp_element_ch2.txt" , average , slot ); - Tflpel(DRAM_DIE.channel3 , "temp_flp_element_ch3.txt" , average , slot ); - Tmap (DRAM_DIE, "output1.txt", slot) ; - Pmap (DRAM_DIE, "output2.txt", slot) ; - diff --git a/DRAMSys/tests/ddr3_parametersAtMemspec/scripts/createTraceDB.sql b/DRAMSys/tests/ddr3_parametersAtMemspec/scripts/createTraceDB.sql deleted file mode 100644 index 7a127fac..00000000 --- a/DRAMSys/tests/ddr3_parametersAtMemspec/scripts/createTraceDB.sql +++ /dev/null @@ -1,94 +0,0 @@ -DROP TABLE IF EXISTS Phases; -DROP TABLE IF EXISTS GeneralInfo; -DROP TABLE IF EXISTS CommandLengths; -DROP TABLE IF EXISTS Comments; -DROP TABLE IF EXISTS ranges; -DROP TABLE IF EXISTS Transactions; -DROP TABLE IF EXISTS DebugMessages; -DROP TABLE IF EXISTS Power; - -CREATE TABLE Phases( - ID INTEGER PRIMARY KEY, - PhaseName TEXT, - PhaseBegin INTEGER, - PhaseEnd INTEGER, - Transact INTEGER -); - -CREATE TABLE GeneralInfo( - NumberOfTransactions INTEGER, - TraceEnd INTEGER, - NumberOfRanks INTEGER, - NumberOfBanks INTEGER, - clk INTEGER, - UnitOfTime TEXT, - MCconfig TEXT, - Memspec TEXT, - Traces TEXT, - WindowSize INTEGER, - FlexibleRefresh INTEGER, - MaxRefBurst INTEGER, - ControllerThread INTEGER -); - -CREATE TABLE CommandLengths( - ACT INTEGER, - PRE INTEGER, - PREA INTEGER, - RD INTEGER, - RDA INTEGER, - WR INTEGER, - WRA INTEGER, - REFA INTEGER, - REFB INTEGER, - PDEA INTEGER, - PDXA INTEGER, - PDEP INTEGER, - PDXP INTEGER, - SREFEN INTEGER, - SREFEX INTEGER -); - -CREATE TABLE Power( - time DOUBLE, - AveragePower DOUBLE -); - - -CREATE TABLE Comments( - Time INTEGER, - Text TEXT -); - -CREATE TABLE DebugMessages( - Time INTEGER, - Message TEXT -); - --- use SQLITE R* TREE Module to make queries on timespans effecient (see http://www.sqlite.org/rtree.html) -CREATE VIRTUAL TABLE ranges USING rtree( - id, - begin, end -); - -CREATE TABLE Transactions( - ID INTEGER, - Range INTEGER, - Address INTEGER, - Burstlength INTEGER, - TThread INTEGER, - TChannel INTEGER, - TRank INTEGER, - TBankgroup INTEGER, - TBank INTEGER, - TRow INTEGER, - TColumn INTEGER, - DataStrobeBegin INTEGER, - DataStrobeEnd INTEGER, - TimeOfGeneration INTEGER, - Command TEXT - ); - -CREATE INDEX ranges_index ON Transactions(Range); -CREATE INDEX "phasesTransactions" ON "Phases" ("Transact" ASC); -CREATE INDEX "messageTimes" ON "DebugMessages" ("Time" ASC); diff --git a/DRAMSys/tests/ddr3_parametersAtMemspec/simulations/ddr3-example.json b/DRAMSys/tests/ddr3_parametersAtMemspec/simulations/ddr3-example.json deleted file mode 100644 index e3d4a4c3..00000000 --- a/DRAMSys/tests/ddr3_parametersAtMemspec/simulations/ddr3-example.json +++ /dev/null @@ -1,16 +0,0 @@ -{ - "simulation": { - "addressmapping": "am_ddr3_8x2Gbx8_dimm_p1KB_dual_rank_rbc.json", - "mcconfig": "fr_fcfs_grp.json", - "memspec": "MICRON_2GB_DDR3-1066_64bit_D_SODIMM.json", - "simconfig": "ddr3.json", - "simulationid": "ddr3-example-dual-rank-json", - "thermalconfig": "config.json", - "tracesetup": [ - { - "clkMhz": 533, - "name": "trace_test2.stl" - } - ] - } -} diff --git a/DRAMSys/tests/ddr4_bankgroups/configs/thermalsim/config.json b/DRAMSys/tests/ddr4_bankgroups/configs/thermalsim/config.json deleted file mode 100644 index b88ed84c..00000000 --- a/DRAMSys/tests/ddr4_bankgroups/configs/thermalsim/config.json +++ /dev/null @@ -1,15 +0,0 @@ -{ - "thermalsimconfig": { - "TemperatureScale": "Celsius", - "StaticTemperatureDefaultValue": 89, - "ThermalSimPeriod":100, - "ThermalSimUnit":"us", - "PowerInfoFile": "powerInfo.json", - "IceServerIp": "127.0.0.1", - "IceServerPort": 11880, - "SimPeriodAdjustFactor" : 10, - "NPowStableCyclesToIncreasePeriod": 5, - "GenerateTemperatureMap": true, - "GeneratePowerMap": true - } -} diff --git a/DRAMSys/tests/ddr4_bankgroups/configs/thermalsim/core.flp b/DRAMSys/tests/ddr4_bankgroups/configs/thermalsim/core.flp deleted file mode 100755 index e85e6801..00000000 --- a/DRAMSys/tests/ddr4_bankgroups/configs/thermalsim/core.flp +++ /dev/null @@ -1,45 +0,0 @@ -CPUs : - - position 0, 0 ; - dimension 2750, 4300 ; - -GPU : - - position 3350, 0 ; - dimension 2750, 4000 ; - -BASEBAND1 : - - position 4250, 4000 ; - dimension 1850, 3300 ; - -BASEBAND2 : - - position 3350, 7300 ; - dimension 2750, 3300 ; - -LLCACHE : - - position 0, 4300 ; - dimension 1900, 3000 ; - -DRAMCTRL1 : - - position 1900, 4300 ; - dimension 850, 3000 ; - -DRAMCTRL2 : - - position 3350, 4000 ; - dimension 900, 3300 ; - -TSVS : - - position 2750, 2300 ; - dimension 600, 6000 ; - -ACELLERATORS : - - position 0, 7300 ; - dimension 2750, 3300 ; - diff --git a/DRAMSys/tests/ddr4_bankgroups/configs/thermalsim/mem.flp b/DRAMSys/tests/ddr4_bankgroups/configs/thermalsim/mem.flp deleted file mode 100755 index 29d02254..00000000 --- a/DRAMSys/tests/ddr4_bankgroups/configs/thermalsim/mem.flp +++ /dev/null @@ -1,16 +0,0 @@ -channel0 : - position 150, 100 ; - dimension 2600, 5200 ; - -channel1 : - position 3350, 100 ; - dimension 2600, 5200 ; - -channel2 : - position 150, 5300 ; - dimension 2600, 5200 ; - -channel3 : - position 3350, 5300 ; - dimension 2600, 5200 ; - diff --git a/DRAMSys/tests/ddr4_bankgroups/configs/thermalsim/powerInfo.json b/DRAMSys/tests/ddr4_bankgroups/configs/thermalsim/powerInfo.json deleted file mode 100644 index 524f690f..00000000 --- a/DRAMSys/tests/ddr4_bankgroups/configs/thermalsim/powerInfo.json +++ /dev/null @@ -1,20 +0,0 @@ -{ - "powerInfo": { - "dram_die_channel0": { - "init_pow": 0, - "threshold": 1.0 - }, - "dram_die_channel1": { - "init_pow": 0, - "threshold": 1.0 - }, - "dram_die_channel2": { - "init_pow": 0, - "threshold": 1.0 - }, - "dram_die_channel3": { - "init_pow": 0, - "threshold": 1.0 - } - } -} diff --git a/DRAMSys/tests/ddr4_bankgroups/configs/thermalsim/stack.stk b/DRAMSys/tests/ddr4_bankgroups/configs/thermalsim/stack.stk deleted file mode 100755 index ec74f020..00000000 --- a/DRAMSys/tests/ddr4_bankgroups/configs/thermalsim/stack.stk +++ /dev/null @@ -1,49 +0,0 @@ -material SILICON : - thermal conductivity 1.30e-4 ; - volumetric heat capacity 1.628e-12 ; - -material BEOL : - thermal conductivity 2.25e-6 ; - volumetric heat capacity 2.175e-12 ; - -material COPPER : - thermal conductivity 4.01e-04 ; - volumetric heat capacity 3.37e-12 ; - -top heat sink : - //sink height 1e03, area 100e06, material COPPER ; - //spreader height 0.5e03, area 70e06, material SILICON ; - heat transfer coefficient 1.3e-09 ; - temperature 318.15 ; -dimensions : - chip length 6100, width 10600 ; - cell length 100, width 100 ; - - -layer PCB : - height 10 ; - material BEOL ; - -die DRAM : - layer 58.5 SILICON ; - source 2 SILICON ; - layer 1.5 BEOL ; - layer 58.5 SILICON ; - - -stack: - die DRAM_DIE DRAM floorplan "./mem.flp" ; - layer CONN_TO_PCB PCB ; - -solver: - transient step 0.01, slot 0.05 ; - initial temperature 300.0 ; - -output: - Tflpel(DRAM_DIE.channel0 , "temp_flp_element_ch0.txt" , average , slot ); - Tflpel(DRAM_DIE.channel1 , "temp_flp_element_ch1.txt" , average , slot ); - Tflpel(DRAM_DIE.channel2 , "temp_flp_element_ch2.txt" , average , slot ); - Tflpel(DRAM_DIE.channel3 , "temp_flp_element_ch3.txt" , average , slot ); - Tmap (DRAM_DIE, "output1.txt", slot) ; - Pmap (DRAM_DIE, "output2.txt", slot) ; - diff --git a/DRAMSys/tests/ddr4_bankgroups/scripts/createTraceDB.sql b/DRAMSys/tests/ddr4_bankgroups/scripts/createTraceDB.sql deleted file mode 100644 index 7a127fac..00000000 --- a/DRAMSys/tests/ddr4_bankgroups/scripts/createTraceDB.sql +++ /dev/null @@ -1,94 +0,0 @@ -DROP TABLE IF EXISTS Phases; -DROP TABLE IF EXISTS GeneralInfo; -DROP TABLE IF EXISTS CommandLengths; -DROP TABLE IF EXISTS Comments; -DROP TABLE IF EXISTS ranges; -DROP TABLE IF EXISTS Transactions; -DROP TABLE IF EXISTS DebugMessages; -DROP TABLE IF EXISTS Power; - -CREATE TABLE Phases( - ID INTEGER PRIMARY KEY, - PhaseName TEXT, - PhaseBegin INTEGER, - PhaseEnd INTEGER, - Transact INTEGER -); - -CREATE TABLE GeneralInfo( - NumberOfTransactions INTEGER, - TraceEnd INTEGER, - NumberOfRanks INTEGER, - NumberOfBanks INTEGER, - clk INTEGER, - UnitOfTime TEXT, - MCconfig TEXT, - Memspec TEXT, - Traces TEXT, - WindowSize INTEGER, - FlexibleRefresh INTEGER, - MaxRefBurst INTEGER, - ControllerThread INTEGER -); - -CREATE TABLE CommandLengths( - ACT INTEGER, - PRE INTEGER, - PREA INTEGER, - RD INTEGER, - RDA INTEGER, - WR INTEGER, - WRA INTEGER, - REFA INTEGER, - REFB INTEGER, - PDEA INTEGER, - PDXA INTEGER, - PDEP INTEGER, - PDXP INTEGER, - SREFEN INTEGER, - SREFEX INTEGER -); - -CREATE TABLE Power( - time DOUBLE, - AveragePower DOUBLE -); - - -CREATE TABLE Comments( - Time INTEGER, - Text TEXT -); - -CREATE TABLE DebugMessages( - Time INTEGER, - Message TEXT -); - --- use SQLITE R* TREE Module to make queries on timespans effecient (see http://www.sqlite.org/rtree.html) -CREATE VIRTUAL TABLE ranges USING rtree( - id, - begin, end -); - -CREATE TABLE Transactions( - ID INTEGER, - Range INTEGER, - Address INTEGER, - Burstlength INTEGER, - TThread INTEGER, - TChannel INTEGER, - TRank INTEGER, - TBankgroup INTEGER, - TBank INTEGER, - TRow INTEGER, - TColumn INTEGER, - DataStrobeBegin INTEGER, - DataStrobeEnd INTEGER, - TimeOfGeneration INTEGER, - Command TEXT - ); - -CREATE INDEX ranges_index ON Transactions(Range); -CREATE INDEX "phasesTransactions" ON "Phases" ("Transact" ASC); -CREATE INDEX "messageTimes" ON "DebugMessages" ("Time" ASC); diff --git a/DRAMSys/tests/lpddr4/ci.yml b/DRAMSys/tests/lpddr4/ci.yml new file mode 100644 index 00000000..40860f3f --- /dev/null +++ b/DRAMSys/tests/lpddr4/ci.yml @@ -0,0 +1,28 @@ +# LPDDR4 with Bankwise Flexible Refresh and FIFO Scheduler: +example_lpddr4: + stage: LPDDR4 + script: + - export GCOV_PREFIX=$(pwd) + - export GCOV_PREFIX_STRIP=$(pwd | awk -F"/" '{print NF-1}') + - cd build/simulator + - ./DRAMSys ../../DRAMSys/tests/lpddr4/simulations/lpddr4-example.json ../../DRAMSys/tests/lpddr4/ + - ls -lah + - ls -lah ../../DRAMSys/tests/lpddr4/expected/ + - sqldiff ../../DRAMSys/tests/lpddr4/expected/lpddr4-example_lpddr4_ch0.tdb lpddr4-example_lpddr4_ch0.tdb + - perl -e 'if(`sqldiff ../../DRAMSys/tests/lpddr4/expected/lpddr4-example_lpddr4_ch0.tdb lpddr4-example_lpddr4_ch0.tdb` eq "") {exit(0)} else {exit(-1)}' + - cd ../traceAnalyzer + - python3 ../../DRAMSys/traceAnalyzer/scripts/tests.py ../simulator/lpddr4-example_lpddr4_ch0.tdb | if ! grep "failed"; then exit 0; else exit 1; fi + # Run Code Coverage + - lcov -q -c --rc geninfo_adjust_src_path=$GCOV_PREFIX -d ${CI_PROJECT_DIR}/build/ -o ${CI_PROJECT_DIR}/coverage/${CI_JOB_NAME}.out + + cache: + key: build + paths: + - build/ + policy: pull + + artifacts: + paths: + - build/simulator/lpddr4-example_lpddr4_ch0.tdb + - coverage/${CI_JOB_NAME}.out + expire_in: 2 days diff --git a/DRAMSys/tests/lpddr4/configs/memspecs/JEDEC_8Gb_LPDDR4-3200_16bit.json b/DRAMSys/tests/lpddr4/configs/memspecs/JEDEC_8Gb_LPDDR4-3200_16bit.json index 97a8cc3e..fce6c632 100644 --- a/DRAMSys/tests/lpddr4/configs/memspecs/JEDEC_8Gb_LPDDR4-3200_16bit.json +++ b/DRAMSys/tests/lpddr4/configs/memspecs/JEDEC_8Gb_LPDDR4-3200_16bit.json @@ -7,7 +7,9 @@ "nbrOfColumns": 1024, "nbrOfRanks": 1, "nbrOfRows": 65536, - "width": 16 + "width": 16, + "NumberOfDevicesOnDIMM": 1, + "NumberOfMemChannels": 1, }, "memoryId": "JEDEC_8Gb_LPDDR4-3200_16bit", "memoryType": "LPDDR4", @@ -40,7 +42,11 @@ "WTR": 16, "XP": 12, "XSR": 460, + "ACTPDEN": 1, + "PRPDEN": 1, + "REFPDEN": 1, + "RTRS": 1, "clkMhz": 1600 } } -} \ No newline at end of file +} diff --git a/DRAMSys/tests/lpddr4/configs/simulator/lpddr4.json b/DRAMSys/tests/lpddr4/configs/simulator/lpddr4.json index fd8fe855..6ea5b1bd 100644 --- a/DRAMSys/tests/lpddr4/configs/simulator/lpddr4.json +++ b/DRAMSys/tests/lpddr4/configs/simulator/lpddr4.json @@ -8,8 +8,6 @@ "EnableWindowing": false, "ErrorCSVFile": "", "ErrorChipSeed": 42, - "NumberOfDevicesOnDIMM": 1, - "NumberOfMemChannels": 1, "PowerAnalysis": false, "SimulationName": "lpddr4", "SimulationProgressBar": true, @@ -18,4 +16,4 @@ "UseMalloc": false, "WindowSize": 1000 } -} \ No newline at end of file +}