From aed3d37699e8739090686104ca987275bc1d188f Mon Sep 17 00:00:00 2001 From: Derek Christ Date: Wed, 23 Feb 2022 12:26:27 +0100 Subject: [PATCH] Switch to C++17 and to std::optional --- DRAMSys/CMakeLists.txt | 2 +- .../src/common/configuration/AddressMapping.h | 17 +- .../src/common/configuration/Configuration.h | 5 +- .../src/common/configuration/McConfig.h | 39 ++--- .../src/common/configuration/SimConfig.h | 29 ++-- .../src/common/configuration/TraceSetup.h | 23 +-- .../common/configuration/memspec/MemSpec.h | 3 +- .../library/src/common/configuration/util.h | 93 +++++------ .../src/configuration/Configuration.cpp | 152 ++++++++---------- .../src/configuration/memspec/MemSpecDDR3.cpp | 26 +-- .../src/configuration/memspec/MemSpecDDR4.cpp | 32 ++-- .../src/configuration/memspec/MemSpecDDR5.cpp | 2 +- .../configuration/memspec/MemSpecWideIO.cpp | 50 +++--- .../library/src/simulation/AddressDecoder.cpp | 39 ++--- DRAMSys/library/src/simulation/DRAMSys.cpp | 4 +- .../src/simulation/TemperatureController.cpp | 2 +- DRAMSys/simulator/CMakeLists.txt | 2 +- DRAMSys/simulator/TraceSetup.cpp | 29 ++-- DRAMSys/simulator/TrafficGenerator.cpp | 72 ++------- DRAMSys/simulator/TrafficGenerator.h | 10 +- DRAMSys/simulator/TrafficInitiator.cpp | 15 -- DRAMSys/simulator/TrafficInitiator.h | 6 +- DRAMSys/simulator/main.cpp | 6 +- DRAMSys/traceAnalyzer/.directory | 8 + DRAMSys/traceAnalyzer/CMakeLists.txt | 2 +- DRAMSys/traceAnalyzer/simulationdialog.cpp | 33 ++-- 26 files changed, 320 insertions(+), 381 deletions(-) create mode 100644 DRAMSys/traceAnalyzer/.directory diff --git a/DRAMSys/CMakeLists.txt b/DRAMSys/CMakeLists.txt index 2904122d..e3d7f388 100644 --- a/DRAMSys/CMakeLists.txt +++ b/DRAMSys/CMakeLists.txt @@ -41,7 +41,7 @@ option(DRAMSYS_COVERAGE_CHECK "Coverage check of DRAMSys") option(DRAMSYS_WITH_GEM5 "Build DRAMSys with gem5 coupling") # Configuration: -set(CMAKE_CXX_STANDARD 11 CACHE STRING "C++ Version") +set(CMAKE_CXX_STANDARD 17 CACHE STRING "C++ Version") set(DCMAKE_SH "CMAKE_SH-NOTFOUND" CACHE STRING "Ignore sh.exe error on Windows") if(DRAMSYS_COVERAGE_CHECK) diff --git a/DRAMSys/library/src/common/configuration/AddressMapping.h b/DRAMSys/library/src/common/configuration/AddressMapping.h index d0ee8082..45920cf8 100644 --- a/DRAMSys/library/src/common/configuration/AddressMapping.h +++ b/DRAMSys/library/src/common/configuration/AddressMapping.h @@ -39,6 +39,7 @@ #include "util.h" #include +#include namespace DRAMSysConfiguration { @@ -57,14 +58,14 @@ void from_json(const json &j, XorPair &x); struct AddressMapping { - Optional> byteBits; - Optional> columnBits; - Optional> bankBits; - Optional> bankGroupBits; - Optional> rowBits; - Optional> channelBits; - Optional> rankBits; - Optional> xorBits; + std::optional> byteBits; + std::optional> columnBits; + std::optional> bankBits; + std::optional> bankGroupBits; + std::optional> rowBits; + std::optional> channelBits; + std::optional> rankBits; + std::optional> xorBits; }; void to_json(json &j, const AddressMapping &m); diff --git a/DRAMSys/library/src/common/configuration/Configuration.h b/DRAMSys/library/src/common/configuration/Configuration.h index 7bbca42d..61091aa1 100644 --- a/DRAMSys/library/src/common/configuration/Configuration.h +++ b/DRAMSys/library/src/common/configuration/Configuration.h @@ -46,6 +46,7 @@ #include #include +#include #include /** @@ -69,8 +70,8 @@ struct Configuration MemSpec memSpec; SimConfig simConfig; std::string simulationId; - Optional thermalConfig; - Optional traceSetup; + std::optional thermalConfig; + std::optional traceSetup; static std::string resourceDirectory; }; diff --git a/DRAMSys/library/src/common/configuration/McConfig.h b/DRAMSys/library/src/common/configuration/McConfig.h index 7ad3329c..ee1b51d8 100644 --- a/DRAMSys/library/src/common/configuration/McConfig.h +++ b/DRAMSys/library/src/common/configuration/McConfig.h @@ -40,6 +40,7 @@ #include #include +#include #include namespace DRAMSysConfiguration @@ -148,25 +149,25 @@ NLOHMANN_JSON_SERIALIZE_ENUM(Arbiter, {{Arbiter::Invalid, nullptr}, struct McConfig { - Optional pagePolicy; - Optional scheduler; - Optional schedulerBuffer; - Optional requestBufferSize; - Optional cmdMux; - Optional respQueue; - Optional refreshPolicy; - Optional refreshMaxPostponed; - Optional refreshMaxPulledin; - Optional powerDownPolicy; - Optional arbiter; - Optional maxActiveTransactions; - Optional refreshManagement; - Optional arbitrationDelayFw; - Optional arbitrationDelayBw; - Optional thinkDelayFw; - Optional thinkDelayBw; - Optional phyDelayFw; - Optional phyDelayBw; + std::optional pagePolicy; + std::optional scheduler; + std::optional schedulerBuffer; + std::optional requestBufferSize; + std::optional cmdMux; + std::optional respQueue; + std::optional refreshPolicy; + std::optional refreshMaxPostponed; + std::optional refreshMaxPulledin; + std::optional powerDownPolicy; + std::optional arbiter; + std::optional maxActiveTransactions; + std::optional refreshManagement; + std::optional arbitrationDelayFw; + std::optional arbitrationDelayBw; + std::optional thinkDelayFw; + std::optional thinkDelayBw; + std::optional phyDelayFw; + std::optional phyDelayBw; }; void to_json(json &j, const McConfig &c); diff --git a/DRAMSys/library/src/common/configuration/SimConfig.h b/DRAMSys/library/src/common/configuration/SimConfig.h index 7c189909..339495c8 100644 --- a/DRAMSys/library/src/common/configuration/SimConfig.h +++ b/DRAMSys/library/src/common/configuration/SimConfig.h @@ -39,6 +39,7 @@ #include "util.h" #include +#include namespace DRAMSysConfiguration { @@ -61,20 +62,20 @@ NLOHMANN_JSON_SERIALIZE_ENUM(StoreMode, {{StoreMode::Invalid, nullptr}, struct SimConfig { - Optional addressOffset; - Optional checkTLM2Protocol; - Optional databaseRecording; - Optional debug; - Optional enableWindowing; - Optional errorCsvFile; - Optional errorChipSeed; - Optional powerAnalysis; - Optional simulationName; - Optional simulationProgressBar; - Optional storeMode; - Optional thermalSimulation; - Optional useMalloc; - Optional windowSize; + std::optional addressOffset; + std::optional checkTLM2Protocol; + std::optional databaseRecording; + std::optional debug; + std::optional enableWindowing; + std::optional errorCsvFile; + std::optional errorChipSeed; + std::optional powerAnalysis; + std::optional simulationName; + std::optional simulationProgressBar; + std::optional storeMode; + std::optional thermalSimulation; + std::optional useMalloc; + std::optional windowSize; }; void to_json(json &j, const SimConfig &c); diff --git a/DRAMSys/library/src/common/configuration/TraceSetup.h b/DRAMSys/library/src/common/configuration/TraceSetup.h index 20cbbd7b..54298cf7 100644 --- a/DRAMSys/library/src/common/configuration/TraceSetup.h +++ b/DRAMSys/library/src/common/configuration/TraceSetup.h @@ -40,6 +40,7 @@ #include #include +#include namespace DRAMSysConfiguration { @@ -75,9 +76,9 @@ struct TrafficInitiator uint64_t clkMhz; std::string name; - Optional maxPendingReadRequests; - Optional maxPendingWriteRequests; - Optional addLengthConverter; + std::optional maxPendingReadRequests; + std::optional maxPendingWriteRequests; + std::optional addLengthConverter; }; struct TracePlayer : public TrafficInitiator @@ -94,11 +95,11 @@ struct TraceGeneratorTrafficState : public TraceGeneratorState uint64_t numRequests; double rwRatio; AddressDistribution addressDistribution; - Optional addressIncrement; - Optional minAddress; - Optional maxAddress; - Optional clksPerRequest; - Optional notify; + std::optional addressIncrement; + std::optional minAddress; + std::optional maxAddress; + std::optional clksPerRequest; + std::optional notify; }; struct TraceGeneratorIdleState : public TraceGeneratorState @@ -114,11 +115,11 @@ struct TraceGeneratorStateTransition struct TraceGenerator : public TrafficInitiator { - Optional seed; - Optional maxTransactions; + std::optional seed; + std::optional maxTransactions; std::map> states; std::multimap transitions; - Optional idleUntil; + std::optional idleUntil; }; struct TraceHammer : public TrafficInitiator diff --git a/DRAMSys/library/src/common/configuration/memspec/MemSpec.h b/DRAMSys/library/src/common/configuration/memspec/MemSpec.h index 66c0a317..0aa2cb7f 100644 --- a/DRAMSys/library/src/common/configuration/memspec/MemSpec.h +++ b/DRAMSys/library/src/common/configuration/memspec/MemSpec.h @@ -42,6 +42,7 @@ #include "util.h" #include +#include namespace DRAMSysConfiguration { @@ -55,7 +56,7 @@ struct MemSpec std::string memoryId; std::string memoryType; MemTimingSpec memTimingSpec; - Optional memPowerSpec; + std::optional memPowerSpec; }; void to_json(json &j, const MemSpec &c); diff --git a/DRAMSys/library/src/common/configuration/util.h b/DRAMSys/library/src/common/configuration/util.h index 5d61f9a7..07c12741 100644 --- a/DRAMSys/library/src/common/configuration/util.h +++ b/DRAMSys/library/src/common/configuration/util.h @@ -37,61 +37,62 @@ #define DRAMSYSCONFIGURATION_UTIL_H #include +#include #include namespace DRAMSysConfiguration { using json = nlohmann::json; -template -class Optional : public std::pair -{ -public: - Optional() : std::pair{{}, false} - { - } - Optional(const T &v) : std::pair{v, true} - { - } +// template +// class Optional : public std::pair +// { +// public: +// Optional() : std::pair{{}, false} +// { +// } +// Optional(const T &v) : std::pair{v, true} +// { +// } - bool isValid() const - { - return this->second; - } +// bool isValid() const +// { +// return this->second; +// } - const T &getValue() const - { - assert(this->second == true); - return this->first; - } +// const T &getValue() const +// { +// assert(this->second == true); +// return this->first; +// } - void setValue(const T &v) - { - this->first = v; - this->second = true; - } +// void setValue(const T &v) +// { +// this->first = v; +// this->second = true; +// } - void invalidate() - { - this->second = false; - } +// void invalidate() +// { +// this->second = false; +// } - /** - * This methods only purpose is to make a optional type - * valid so that it can be written to by reference. - */ - T &setByReference() - { - this->second = true; - return this->first; - } -}; +// /** +// * This methods only purpose is to make a optional type +// * valid so that it can be written to by reference. +// */ +// T &setByReference() +// { +// this->second = true; +// return this->first; +// } +// }; template void invalidateEnum(T &value) { - if (value.isValid() && value.getValue() == T::first_type::Invalid) - value.invalidate(); + if (value.has_value() && value.value() == T::value_type::Invalid) + value.reset(); } json get_config_json(const json &j, const std::string &configPath, const std::string &objectName); @@ -119,22 +120,22 @@ namespace nlohmann { template -void to_json(nlohmann::json &j, const DRAMSysConfiguration::Optional &v) +void to_json(nlohmann::json &j, const std::optional &v) { - if (v.isValid()) - j = v.getValue(); + if (v.has_value()) + j = v.value(); else j = nullptr; } template -void from_json(const nlohmann::json &j, DRAMSysConfiguration::Optional &v) +void from_json(const nlohmann::json &j, std::optional &v) { if (j.is_null()) - v = {}; + v = std::nullopt; else { - v = {j.get()}; + v = j.get(); } } diff --git a/DRAMSys/library/src/configuration/Configuration.cpp b/DRAMSys/library/src/configuration/Configuration.cpp index 9c559a26..76636cd4 100644 --- a/DRAMSys/library/src/configuration/Configuration.cpp +++ b/DRAMSys/library/src/configuration/Configuration.cpp @@ -78,55 +78,53 @@ enum sc_time_unit string2TimeUnit(const std::string &s) void Configuration::loadSimConfig(Configuration &config, const DRAMSysConfiguration::SimConfig &simConfig) { - if (simConfig.addressOffset.isValid()) - config.addressOffset = simConfig.addressOffset.getValue(); + if (const auto &addressOffset = simConfig.addressOffset) + config.addressOffset = *addressOffset; - if (simConfig.checkTLM2Protocol.isValid()) - config.checkTLM2Protocol = simConfig.checkTLM2Protocol.getValue(); + if (const auto &checkTLM2Protocol = simConfig.checkTLM2Protocol) + config.checkTLM2Protocol = *checkTLM2Protocol; - if (simConfig.databaseRecording.isValid()) - config.databaseRecording = simConfig.databaseRecording.getValue(); + if (const auto &databaseRecording = simConfig.databaseRecording) + config.databaseRecording = *databaseRecording; - if (simConfig.debug.isValid()) - config.debug = simConfig.debug.getValue(); + if (const auto &debug = simConfig.debug) + config.debug = *debug; - if (simConfig.enableWindowing.isValid()) - config.enableWindowing = simConfig.enableWindowing.getValue(); + if (const auto &enableWindowing = simConfig.enableWindowing) + config.enableWindowing = *enableWindowing; - if (simConfig.powerAnalysis.isValid()) - config.powerAnalysis = simConfig.powerAnalysis.getValue(); + if (const auto &powerAnalysis = simConfig.powerAnalysis) + config.powerAnalysis = *powerAnalysis; - if (simConfig.simulationName.isValid()) - config.simulationName = simConfig.simulationName.getValue(); + if (const auto &simulationName = simConfig.simulationName) + config.simulationName = *simulationName; - if (simConfig.simulationProgressBar.isValid()) - config.simulationProgressBar = simConfig.simulationProgressBar.getValue(); + if (const auto &simulationProgressBar = simConfig.simulationProgressBar) + config.simulationProgressBar = *simulationProgressBar; - if (simConfig.thermalSimulation.isValid()) - config.thermalSimulation = simConfig.thermalSimulation.getValue(); + if (const auto &thermalSimulation = simConfig.thermalSimulation) + config.thermalSimulation = *thermalSimulation; - if (simConfig.useMalloc.isValid()) - config.useMalloc = simConfig.useMalloc.getValue(); + if (const auto &useMalloc = simConfig.useMalloc) + config.useMalloc = *useMalloc; - if (simConfig.windowSize.isValid()) - config.windowSize = simConfig.windowSize.getValue(); + if (const auto &windowSize = simConfig.windowSize) + config.windowSize = *windowSize; if (config.windowSize == 0) SC_REPORT_FATAL("Configuration", "Minimum window size is 1"); - if (simConfig.errorCsvFile.isValid()) - config.errorCSVFile = simConfig.errorCsvFile.getValue(); + if (const auto &errorCsvFile = simConfig.errorCsvFile) + config.errorCSVFile = *errorCsvFile; - if (simConfig.errorChipSeed.isValid()) - config.errorChipSeed = simConfig.errorChipSeed.getValue(); + if (const auto &errorChipSeed = simConfig.errorChipSeed) + config.errorChipSeed = *errorChipSeed; - if (simConfig.storeMode.isValid()) + if (const auto &storeMode = simConfig.storeMode) config.storeMode = [=] { - auto mode = simConfig.storeMode.getValue(); - - if (mode == DRAMSysConfiguration::StoreMode::NoStorage) + if (storeMode == DRAMSysConfiguration::StoreMode::NoStorage) return StoreMode::NoStorage; - else if (mode == DRAMSysConfiguration::StoreMode::Store) + else if (storeMode == DRAMSysConfiguration::StoreMode::Store) return StoreMode::Store; else return StoreMode::ErrorModel; @@ -180,24 +178,20 @@ void Configuration::loadTemperatureSimConfig(Configuration &config, const DRAMSy void Configuration::loadMCConfig(Configuration &config, const DRAMSysConfiguration::McConfig &mcConfig) { - if (mcConfig.pagePolicy.isValid()) + if (const auto &pagePolicy = mcConfig.pagePolicy) config.pagePolicy = [=] { - auto policy = mcConfig.pagePolicy.getValue(); - - if (policy == DRAMSysConfiguration::PagePolicy::Open) + if (pagePolicy == DRAMSysConfiguration::PagePolicy::Open) return PagePolicy::Open; - else if (policy == DRAMSysConfiguration::PagePolicy::OpenAdaptive) + else if (pagePolicy == DRAMSysConfiguration::PagePolicy::OpenAdaptive) return PagePolicy::OpenAdaptive; - else if (policy == DRAMSysConfiguration::PagePolicy::Closed) + else if (pagePolicy == DRAMSysConfiguration::PagePolicy::Closed) return PagePolicy::Closed; else return PagePolicy::ClosedAdaptive; }(); - if (mcConfig.scheduler.isValid()) + if (const auto &scheduler = mcConfig.scheduler) config.scheduler = [=] { - auto scheduler = mcConfig.scheduler.getValue(); - if (scheduler == DRAMSysConfiguration::Scheduler::Fifo) return Scheduler::Fifo; else if (scheduler == DRAMSysConfiguration::Scheduler::FrFcfs) @@ -206,10 +200,8 @@ void Configuration::loadMCConfig(Configuration &config, const DRAMSysConfigurati return Scheduler::FrFcfsGrp; }(); - if (mcConfig.schedulerBuffer.isValid()) + if (const auto &schedulerBuffer = mcConfig.schedulerBuffer) config.schedulerBuffer = [=] { - auto schedulerBuffer = mcConfig.schedulerBuffer.getValue(); - if (schedulerBuffer == DRAMSysConfiguration::SchedulerBuffer::Bankwise) return SchedulerBuffer::Bankwise; else if (schedulerBuffer == DRAMSysConfiguration::SchedulerBuffer::ReadWrite) @@ -218,68 +210,58 @@ void Configuration::loadMCConfig(Configuration &config, const DRAMSysConfigurati return SchedulerBuffer::Shared; }(); - if (mcConfig.requestBufferSize.isValid()) - config.requestBufferSize = mcConfig.requestBufferSize.getValue(); + if (const auto &requestBufferSize = mcConfig.requestBufferSize) + config.requestBufferSize = *mcConfig.requestBufferSize; if (config.requestBufferSize == 0) SC_REPORT_FATAL("Configuration", "Minimum request buffer size is 1!"); - if (mcConfig.cmdMux.isValid()) + if (const auto &cmdMux = mcConfig.cmdMux) config.cmdMux = [=] { - auto cmdMux = mcConfig.cmdMux.getValue(); - if (cmdMux == DRAMSysConfiguration::CmdMux::Oldest) return CmdMux::Oldest; else return CmdMux::Strict; }(); - if (mcConfig.respQueue.isValid()) + if (const auto &respQueue = mcConfig.respQueue) config.respQueue = [=] { - auto respQueue = mcConfig.respQueue.getValue(); - if (respQueue == DRAMSysConfiguration::RespQueue::Fifo) return RespQueue::Fifo; else return RespQueue::Reorder; }(); - if (mcConfig.refreshPolicy.isValid()) + if (const auto &refreshPolicy = mcConfig.refreshPolicy) config.refreshPolicy = [=] { - auto policy = mcConfig.refreshPolicy.getValue(); - - if (policy == DRAMSysConfiguration::RefreshPolicy::NoRefresh) + if (refreshPolicy == DRAMSysConfiguration::RefreshPolicy::NoRefresh) return RefreshPolicy::NoRefresh; - else if (policy == DRAMSysConfiguration::RefreshPolicy::AllBank) + else if (refreshPolicy == DRAMSysConfiguration::RefreshPolicy::AllBank) return RefreshPolicy::AllBank; - else if (policy == DRAMSysConfiguration::RefreshPolicy::PerBank) + else if (refreshPolicy == DRAMSysConfiguration::RefreshPolicy::PerBank) return RefreshPolicy::PerBank; - else if (policy == DRAMSysConfiguration::RefreshPolicy::Per2Bank) + else if (refreshPolicy == DRAMSysConfiguration::RefreshPolicy::Per2Bank) return RefreshPolicy::Per2Bank; else // if (policy == DRAMSysConfiguration::RefreshPolicy::SameBank) return RefreshPolicy::SameBank; }(); - if (mcConfig.refreshMaxPostponed.isValid()) - config.refreshMaxPostponed = mcConfig.refreshMaxPostponed.getValue(); + if (const auto &refreshMaxPostponed = mcConfig.refreshMaxPostponed) + config.refreshMaxPostponed = *refreshMaxPostponed; - if (mcConfig.refreshMaxPulledin.isValid()) - config.refreshMaxPulledin = mcConfig.refreshMaxPulledin.getValue(); + if (const auto &refreshMaxPulledin = mcConfig.refreshMaxPulledin) + config.refreshMaxPulledin = *refreshMaxPulledin; - if (mcConfig.powerDownPolicy.isValid()) + if (const auto &powerDownPolicy = mcConfig.powerDownPolicy) config.powerDownPolicy = [=] { - auto policy = mcConfig.powerDownPolicy.getValue(); - - if (policy == DRAMSysConfiguration::PowerDownPolicy::NoPowerDown) + if (powerDownPolicy == DRAMSysConfiguration::PowerDownPolicy::NoPowerDown) return PowerDownPolicy::NoPowerDown; else return PowerDownPolicy::Staggered; }(); - if (mcConfig.arbiter.isValid()) + if (const auto &arbiter = mcConfig.arbiter) config.arbiter = [=] { - auto arbiter = mcConfig.arbiter.getValue(); - if (arbiter == DRAMSysConfiguration::Arbiter::Simple) return Arbiter::Simple; else if (arbiter == DRAMSysConfiguration::Arbiter::Fifo) @@ -288,40 +270,40 @@ void Configuration::loadMCConfig(Configuration &config, const DRAMSysConfigurati return Arbiter::Reorder; }(); - if (mcConfig.maxActiveTransactions.isValid()) - config.maxActiveTransactions = mcConfig.maxActiveTransactions.getValue(); + if (const auto &maxActiveTransactions = mcConfig.maxActiveTransactions) + config.maxActiveTransactions = *maxActiveTransactions; - if (mcConfig.refreshManagement.isValid()) - config.refreshManagement = mcConfig.refreshManagement.getValue(); + if (const auto &refreshManagement = mcConfig.refreshManagement) + config.refreshManagement = *refreshManagement; - if (mcConfig.arbitrationDelayFw.isValid()) + if (const auto &arbitrationDelayFw = mcConfig.arbitrationDelayFw) { - config.arbitrationDelayFw = std::round(sc_time(mcConfig.arbitrationDelayFw.getValue(), SC_NS) / config.memSpec->tCK) * config.memSpec->tCK; + config.arbitrationDelayFw = std::round(sc_time(*arbitrationDelayFw, SC_NS) / config.memSpec->tCK) * config.memSpec->tCK; } - if (mcConfig.arbitrationDelayBw.isValid()) + if (const auto &arbitrationDelayBw = mcConfig.arbitrationDelayBw) { - config.arbitrationDelayBw = std::round(sc_time(mcConfig.arbitrationDelayBw.getValue(), SC_NS) / config.memSpec->tCK) * config.memSpec->tCK; + config.arbitrationDelayBw = std::round(sc_time(*arbitrationDelayBw, SC_NS) / config.memSpec->tCK) * config.memSpec->tCK; } - if (mcConfig.thinkDelayFw.isValid()) + if (const auto &thinkDelayFw = mcConfig.thinkDelayFw) { - config.thinkDelayFw = std::round(sc_time(mcConfig.thinkDelayFw.getValue(), SC_NS) / config.memSpec->tCK) * config.memSpec->tCK; + config.thinkDelayFw = std::round(sc_time(*thinkDelayFw, SC_NS) / config.memSpec->tCK) * config.memSpec->tCK; } - if (mcConfig.thinkDelayBw.isValid()) + if (const auto &thinkDelayBw = mcConfig.thinkDelayBw) { - config.thinkDelayBw = std::round(sc_time(mcConfig.thinkDelayBw.getValue(), SC_NS) / config.memSpec->tCK) * config.memSpec->tCK; + config.thinkDelayBw = std::round(sc_time(*thinkDelayBw, SC_NS) / config.memSpec->tCK) * config.memSpec->tCK; } - if (mcConfig.phyDelayFw.isValid()) + if (const auto &phyDelayFw = mcConfig.phyDelayFw) { - config.phyDelayFw = std::round(sc_time(mcConfig.phyDelayFw.getValue(), SC_NS) / config.memSpec->tCK) * config.memSpec->tCK; + config.phyDelayFw = std::round(sc_time(*phyDelayFw, SC_NS) / config.memSpec->tCK) * config.memSpec->tCK; } - if (mcConfig.phyDelayBw.isValid()) + if (const auto &phyDelayBw = mcConfig.phyDelayBw) { - config.phyDelayBw = std::round(sc_time(mcConfig.phyDelayBw.getValue(), SC_NS) / config.memSpec->tCK) * config.memSpec->tCK; + config.phyDelayBw = std::round(sc_time(*phyDelayBw, SC_NS) / config.memSpec->tCK) * config.memSpec->tCK; } } diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecDDR3.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecDDR3.cpp index 81b8b2df..b17601f1 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecDDR3.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecDDR3.cpp @@ -80,24 +80,24 @@ MemSpecDDR3::MemSpecDDR3(const DRAMSysConfiguration::MemSpec &memSpec) tPRPDEN (tCK * memSpec.memTimingSpec.entries.at("PRPDEN")), tREFPDEN (tCK * memSpec.memTimingSpec.entries.at("REFPDEN")), tRTRS (tCK * memSpec.memTimingSpec.entries.at("RTRS")), - iDD0 (memSpec.memPowerSpec.getValue().entries.at("idd0")), - iDD2N (memSpec.memPowerSpec.getValue().entries.at("idd2n")), - iDD3N (memSpec.memPowerSpec.getValue().entries.at("idd3n")), - iDD4R (memSpec.memPowerSpec.getValue().entries.at("idd4r")), - iDD4W (memSpec.memPowerSpec.getValue().entries.at("idd4w")), - iDD5 (memSpec.memPowerSpec.getValue().entries.at("idd5")), - iDD6 (memSpec.memPowerSpec.getValue().entries.at("idd6")), - vDD (memSpec.memPowerSpec.getValue().entries.at("vdd")), - iDD2P0 (memSpec.memPowerSpec.getValue().entries.at("idd2p0")), - iDD2P1 (memSpec.memPowerSpec.getValue().entries.at("idd2p1")), - iDD3P0 (memSpec.memPowerSpec.getValue().entries.at("idd3p0")), - iDD3P1 (memSpec.memPowerSpec.getValue().entries.at("idd3p1")) + iDD0 (memSpec.memPowerSpec.value().entries.at("idd0")), + iDD2N (memSpec.memPowerSpec.value().entries.at("idd2n")), + iDD3N (memSpec.memPowerSpec.value().entries.at("idd3n")), + iDD4R (memSpec.memPowerSpec.value().entries.at("idd4r")), + iDD4W (memSpec.memPowerSpec.value().entries.at("idd4w")), + iDD5 (memSpec.memPowerSpec.value().entries.at("idd5")), + iDD6 (memSpec.memPowerSpec.value().entries.at("idd6")), + vDD (memSpec.memPowerSpec.value().entries.at("vdd")), + iDD2P0 (memSpec.memPowerSpec.value().entries.at("idd2p0")), + iDD2P1 (memSpec.memPowerSpec.value().entries.at("idd2p1")), + iDD3P0 (memSpec.memPowerSpec.value().entries.at("idd3p0")), + iDD3P1 (memSpec.memPowerSpec.value().entries.at("idd3p1")) { uint64_t deviceSizeBits = static_cast(banksPerRank) * numberOfRows * numberOfColumns * bitWidth; uint64_t deviceSizeBytes = deviceSizeBits / 8; memorySizeBytes = deviceSizeBytes * numberOfDevices * numberOfRanks * numberOfChannels; - if (!memSpec.memPowerSpec.isValid()) + if (!memSpec.memPowerSpec.has_value()) SC_REPORT_FATAL("MemSpec", "No power spec defined!"); std::cout << headline << std::endl; diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecDDR4.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecDDR4.cpp index f2c9a204..428584ab 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecDDR4.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecDDR4.cpp @@ -95,27 +95,27 @@ MemSpecDDR4::MemSpecDDR4(const DRAMSysConfiguration::MemSpec &memSpec) tPRPDEN (tCK * memSpec.memTimingSpec.entries.at("PRPDEN")), tREFPDEN (tCK * memSpec.memTimingSpec.entries.at("REFPDEN")), tRTRS (tCK * memSpec.memTimingSpec.entries.at("RTRS")), - iDD0 (memSpec.memPowerSpec.getValue().entries.at("idd0")), - iDD2N (memSpec.memPowerSpec.getValue().entries.at("idd2n")), - iDD3N (memSpec.memPowerSpec.getValue().entries.at("idd3n")), - iDD4R (memSpec.memPowerSpec.getValue().entries.at("idd4r")), - iDD4W (memSpec.memPowerSpec.getValue().entries.at("idd4w")), - iDD5 (memSpec.memPowerSpec.getValue().entries.at("idd5")), - iDD6 (memSpec.memPowerSpec.getValue().entries.at("idd6")), - vDD (memSpec.memPowerSpec.getValue().entries.at("vdd")), - iDD02 (memSpec.memPowerSpec.getValue().entries.at("idd02")), - iDD2P0 (memSpec.memPowerSpec.getValue().entries.at("idd2p0")), - iDD2P1 (memSpec.memPowerSpec.getValue().entries.at("idd2p1")), - iDD3P0 (memSpec.memPowerSpec.getValue().entries.at("idd3p0")), - iDD3P1 (memSpec.memPowerSpec.getValue().entries.at("idd3p1")), - iDD62 (memSpec.memPowerSpec.getValue().entries.at("idd62")), - vDD2 (memSpec.memPowerSpec.getValue().entries.at("vdd2")) + iDD0 (memSpec.memPowerSpec.value().entries.at("idd0")), + iDD2N (memSpec.memPowerSpec.value().entries.at("idd2n")), + iDD3N (memSpec.memPowerSpec.value().entries.at("idd3n")), + iDD4R (memSpec.memPowerSpec.value().entries.at("idd4r")), + iDD4W (memSpec.memPowerSpec.value().entries.at("idd4w")), + iDD5 (memSpec.memPowerSpec.value().entries.at("idd5")), + iDD6 (memSpec.memPowerSpec.value().entries.at("idd6")), + vDD (memSpec.memPowerSpec.value().entries.at("vdd")), + iDD02 (memSpec.memPowerSpec.value().entries.at("idd02")), + iDD2P0 (memSpec.memPowerSpec.value().entries.at("idd2p0")), + iDD2P1 (memSpec.memPowerSpec.value().entries.at("idd2p1")), + iDD3P0 (memSpec.memPowerSpec.value().entries.at("idd3p0")), + iDD3P1 (memSpec.memPowerSpec.value().entries.at("idd3p1")), + iDD62 (memSpec.memPowerSpec.value().entries.at("idd62")), + vDD2 (memSpec.memPowerSpec.value().entries.at("vdd2")) { uint64_t deviceSizeBits = static_cast(banksPerRank) * numberOfRows * numberOfColumns * bitWidth; uint64_t deviceSizeBytes = deviceSizeBits / 8; memorySizeBytes = deviceSizeBytes * numberOfDevices * numberOfRanks * numberOfChannels; - if (!memSpec.memPowerSpec.isValid()) + if (!memSpec.memPowerSpec.has_value()) SC_REPORT_FATAL("MemSpec", "No power spec defined!"); std::cout << headline << std::endl; diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecDDR5.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecDDR5.cpp index 9b6f5bbe..23b6db52 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecDDR5.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecDDR5.cpp @@ -101,7 +101,7 @@ MemSpecDDR5::MemSpecDDR5(const DRAMSysConfiguration::MemSpec &memSpec) tRFC_dpr ((refMode == 1) ? tCK * memSpec.memTimingSpec.entries.at("RFC1_dpr") : tCK * memSpec.memTimingSpec.entries.at("RFC2_dpr")), tRFCsb_slr (tCK * memSpec.memTimingSpec.entries.at("RFCsb_slr")), - tRFCsb_dlr (tCK * memSpec.memTimingSpec.entries.at("RFCsb_dlr ")), + tRFCsb_dlr (tCK * memSpec.memTimingSpec.entries.at("RFCsb_dlr")), tREFI ((refMode == 1) ? tCK * memSpec.memTimingSpec.entries.at("REFI1") : tCK * memSpec.memTimingSpec.entries.at("REFI2")), tREFIsb (tCK * memSpec.memTimingSpec.entries.at("REFISB")), diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecWideIO.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecWideIO.cpp index f9ed3b9c..9b84c30f 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecWideIO.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecWideIO.cpp @@ -74,36 +74,36 @@ MemSpecWideIO::MemSpecWideIO(const DRAMSysConfiguration::MemSpec &memSpec) tTAW (tCK * memSpec.memTimingSpec.entries.at("TAW")), tWTR (tCK * memSpec.memTimingSpec.entries.at("WTR")), tRTRS (tCK * memSpec.memTimingSpec.entries.at("RTRS")), - iDD0 (memSpec.memPowerSpec.getValue().entries.at("idd0")), - iDD2N (memSpec.memPowerSpec.getValue().entries.at("idd2n")), - iDD3N (memSpec.memPowerSpec.getValue().entries.at("idd3n")), - iDD4R (memSpec.memPowerSpec.getValue().entries.at("idd4r")), - iDD4W (memSpec.memPowerSpec.getValue().entries.at("idd4w")), - iDD5 (memSpec.memPowerSpec.getValue().entries.at("idd5")), - iDD6 (memSpec.memPowerSpec.getValue().entries.at("idd6")), - vDD (memSpec.memPowerSpec.getValue().entries.at("vdd")), - iDD02 (memSpec.memPowerSpec.getValue().entries.at("idd02")), - iDD2P0 (memSpec.memPowerSpec.getValue().entries.at("idd2p0")), - iDD2P02 (memSpec.memPowerSpec.getValue().entries.at("idd2p02")), - iDD2P1 (memSpec.memPowerSpec.getValue().entries.at("idd2p1")), - iDD2P12 (memSpec.memPowerSpec.getValue().entries.at("idd2p12")), - iDD2N2 (memSpec.memPowerSpec.getValue().entries.at("idd2n2")), - iDD3P0 (memSpec.memPowerSpec.getValue().entries.at("idd3p0")), - iDD3P02 (memSpec.memPowerSpec.getValue().entries.at("idd3p02")), - iDD3P1 (memSpec.memPowerSpec.getValue().entries.at("idd3p1")), - iDD3P12 (memSpec.memPowerSpec.getValue().entries.at("idd3p12")), - iDD3N2 (memSpec.memPowerSpec.getValue().entries.at("idd3n2")), - iDD4R2 (memSpec.memPowerSpec.getValue().entries.at("idd4r2")), - iDD4W2 (memSpec.memPowerSpec.getValue().entries.at("idd4w2")), - iDD52 (memSpec.memPowerSpec.getValue().entries.at("idd52")), - iDD62 (memSpec.memPowerSpec.getValue().entries.at("idd62")), - vDD2 (memSpec.memPowerSpec.getValue().entries.at("vdd2")) + iDD0 (memSpec.memPowerSpec.value().entries.at("idd0")), + iDD2N (memSpec.memPowerSpec.value().entries.at("idd2n")), + iDD3N (memSpec.memPowerSpec.value().entries.at("idd3n")), + iDD4R (memSpec.memPowerSpec.value().entries.at("idd4r")), + iDD4W (memSpec.memPowerSpec.value().entries.at("idd4w")), + iDD5 (memSpec.memPowerSpec.value().entries.at("idd5")), + iDD6 (memSpec.memPowerSpec.value().entries.at("idd6")), + vDD (memSpec.memPowerSpec.value().entries.at("vdd")), + iDD02 (memSpec.memPowerSpec.value().entries.at("idd02")), + iDD2P0 (memSpec.memPowerSpec.value().entries.at("idd2p0")), + iDD2P02 (memSpec.memPowerSpec.value().entries.at("idd2p02")), + iDD2P1 (memSpec.memPowerSpec.value().entries.at("idd2p1")), + iDD2P12 (memSpec.memPowerSpec.value().entries.at("idd2p12")), + iDD2N2 (memSpec.memPowerSpec.value().entries.at("idd2n2")), + iDD3P0 (memSpec.memPowerSpec.value().entries.at("idd3p0")), + iDD3P02 (memSpec.memPowerSpec.value().entries.at("idd3p02")), + iDD3P1 (memSpec.memPowerSpec.value().entries.at("idd3p1")), + iDD3P12 (memSpec.memPowerSpec.value().entries.at("idd3p12")), + iDD3N2 (memSpec.memPowerSpec.value().entries.at("idd3n2")), + iDD4R2 (memSpec.memPowerSpec.value().entries.at("idd4r2")), + iDD4W2 (memSpec.memPowerSpec.value().entries.at("idd4w2")), + iDD52 (memSpec.memPowerSpec.value().entries.at("idd52")), + iDD62 (memSpec.memPowerSpec.value().entries.at("idd62")), + vDD2 (memSpec.memPowerSpec.value().entries.at("vdd2")) { uint64_t deviceSizeBits = static_cast(banksPerRank) * numberOfRows * numberOfColumns * bitWidth; uint64_t deviceSizeBytes = deviceSizeBits / 8; memorySizeBytes = deviceSizeBytes * numberOfRanks * numberOfChannels; - if (!memSpec.memPowerSpec.isValid()) + if (!memSpec.memPowerSpec.has_value()) SC_REPORT_FATAL("MemSpec", "No power spec defined!"); std::cout << headline << std::endl; diff --git a/DRAMSys/library/src/simulation/AddressDecoder.cpp b/DRAMSys/library/src/simulation/AddressDecoder.cpp index 84fb7f9a..178fa6db 100644 --- a/DRAMSys/library/src/simulation/AddressDecoder.cpp +++ b/DRAMSys/library/src/simulation/AddressDecoder.cpp @@ -47,54 +47,47 @@ AddressDecoder::AddressDecoder(const DRAMSysConfiguration::AddressMapping &addressMapping) { - if (addressMapping.channelBits.isValid()) + if (const auto &channelBits = addressMapping.channelBits) { - auto channelBits = addressMapping.channelBits.getValue(); - std::copy(channelBits.begin(), channelBits.end(), std::back_inserter(vChannelBits)); + std::copy(channelBits->begin(), channelBits->end(), std::back_inserter(vChannelBits)); } - if (addressMapping.rankBits.isValid()) + if (const auto &rankBits = addressMapping.rankBits) { - auto rankBits = addressMapping.rankBits.getValue(); - std::copy(rankBits.begin(), rankBits.end(), std::back_inserter(vRankBits)); + std::copy(rankBits->begin(), rankBits->end(), std::back_inserter(vRankBits)); } - if (addressMapping.bankGroupBits.isValid()) + if (const auto &bankGroupBits = addressMapping.bankGroupBits) { - auto bankBroupBits = addressMapping.bankGroupBits.getValue(); - std::copy(bankBroupBits.begin(), bankBroupBits.end(), std::back_inserter(vBankGroupBits)); + std::copy(bankGroupBits->begin(), bankGroupBits->end(), std::back_inserter(vBankGroupBits)); } - if (addressMapping.byteBits.isValid()) + if (const auto &byteBits = addressMapping.byteBits) { - auto byteBits = addressMapping.byteBits.getValue(); - std::copy(byteBits.begin(), byteBits.end(), std::back_inserter(vByteBits)); + std::copy(byteBits->begin(), byteBits->end(), std::back_inserter(vByteBits)); } - if (addressMapping.xorBits.isValid()) + if (const auto &xorBits = addressMapping.xorBits) { - for (const auto &xorBit : addressMapping.xorBits.getValue()) + for (const auto &xorBit : *xorBits) { vXor.emplace_back(xorBit.first, xorBit.second); } } - if (addressMapping.bankBits.isValid()) + if (const auto &bankBits = addressMapping.bankBits) { - auto bankBits = addressMapping.bankBits.getValue(); - std::copy(bankBits.begin(), bankBits.end(), std::back_inserter(vBankBits)); + std::copy(bankBits->begin(), bankBits->end(), std::back_inserter(vBankBits)); } - if (addressMapping.rowBits.isValid()) + if (const auto &rowBits = addressMapping.rowBits) { - auto rowBits = addressMapping.rowBits.getValue(); - std::copy(rowBits.begin(), rowBits.end(), std::back_inserter(vRowBits)); + std::copy(rowBits->begin(), rowBits->end(), std::back_inserter(vRowBits)); } - if (addressMapping.columnBits.isValid()) + if (const auto &columnBits = addressMapping.columnBits) { - auto columnBits = addressMapping.columnBits.getValue(); - std::copy(columnBits.begin(), columnBits.end(), std::back_inserter(vColumnBits)); + std::copy(columnBits->begin(), columnBits->end(), std::back_inserter(vColumnBits)); } unsigned channels = std::lround(std::pow(2.0, vChannelBits.size())); diff --git a/DRAMSys/library/src/simulation/DRAMSys.cpp b/DRAMSys/library/src/simulation/DRAMSys.cpp index 21f7a222..c1fb3065 100644 --- a/DRAMSys/library/src/simulation/DRAMSys.cpp +++ b/DRAMSys/library/src/simulation/DRAMSys.cpp @@ -80,8 +80,8 @@ DRAMSys::DRAMSys(const sc_core::sc_module_name &name, Configuration::loadMCConfig(Configuration::getInstance(), config.mcConfig); Configuration::loadSimConfig(Configuration::getInstance(), config.simConfig); - if (config.thermalConfig.isValid()) - Configuration::loadTemperatureSimConfig(Configuration::getInstance(), config.thermalConfig.getValue()); + if (const auto &thermalConfig = config.thermalConfig) + Configuration::loadTemperatureSimConfig(Configuration::getInstance(), *thermalConfig); // Setup the debug manager: setupDebugManager(Configuration::getInstance().simulationName); diff --git a/DRAMSys/library/src/simulation/TemperatureController.cpp b/DRAMSys/library/src/simulation/TemperatureController.cpp index f66469c9..77ef5d1e 100644 --- a/DRAMSys/library/src/simulation/TemperatureController.cpp +++ b/DRAMSys/library/src/simulation/TemperatureController.cpp @@ -149,7 +149,7 @@ double TemperatureController::adjustThermalSimPeriod() cyclesSinceLastPeriodAdjust++; if (cyclesSinceLastPeriodAdjust >= nPowStableCyclesToIncreasePeriod) { cyclesSinceLastPeriodAdjust = 0; - period = period * (periodAdjustFactor / 2); + period = period * ((double)periodAdjustFactor / 2); if (period > targetPeriod) period = targetPeriod; PRINTDEBUGMESSAGE(name(), "Thermal Simulation period increased to " diff --git a/DRAMSys/simulator/CMakeLists.txt b/DRAMSys/simulator/CMakeLists.txt index 43b59dd2..507d6a71 100644 --- a/DRAMSys/simulator/CMakeLists.txt +++ b/DRAMSys/simulator/CMakeLists.txt @@ -39,7 +39,7 @@ cmake_minimum_required(VERSION 3.10) project(DRAMSysSimulator) # Configuration: -set(CMAKE_CXX_STANDARD 11 CACHE STRING "C++ Version") +set(CMAKE_CXX_STANDARD 17 CACHE STRING "C++ Version") set(DCMAKE_SH="CMAKE_SH-NOTFOUND") find_package(Threads REQUIRED) diff --git a/DRAMSys/simulator/TraceSetup.cpp b/DRAMSys/simulator/TraceSetup.cpp index 7bd468f8..3672408d 100644 --- a/DRAMSys/simulator/TraceSetup.cpp +++ b/DRAMSys/simulator/TraceSetup.cpp @@ -59,23 +59,26 @@ TraceSetup::TraceSetup(const DRAMSysConfiguration::TraceSetup &traceSetup, std::string name = inititator->name; - unsigned int maxPendingReadRequests = [=]() -> unsigned int { - if (inititator->maxPendingReadRequests.isValid()) - return inititator->maxPendingReadRequests.getValue(); + unsigned int maxPendingReadRequests = [=]() -> unsigned int + { + if (const auto &maxPendingReadRequests = inititator->maxPendingReadRequests) + return *maxPendingReadRequests; else return 0; }(); - unsigned int maxPendingWriteRequests = [=]() -> unsigned int { - if (inititator->maxPendingWriteRequests.isValid()) - return inititator->maxPendingWriteRequests.getValue(); + unsigned int maxPendingWriteRequests = [=]() -> unsigned int + { + if (const auto &maxPendingWriteRequests = inititator->maxPendingWriteRequests) + return *maxPendingWriteRequests; else return 0; }(); - bool addLengthConverter = [=]() -> bool { - if (inititator->addLengthConverter.isValid()) - return inititator->addLengthConverter.getValue(); + bool addLengthConverter = [=]() -> bool + { + if (const auto &addLengthConverter = inititator->addLengthConverter) + return *addLengthConverter; else return false; }(); @@ -132,10 +135,8 @@ TraceSetup::TraceSetup(const DRAMSysConfiguration::TraceSetup &traceSetup, { if (auto generatorConf = std::dynamic_pointer_cast(inititatorConf)) { - if (generatorConf->idleUntil.isValid()) + if (const auto &idleUntil = generatorConf->idleUntil) { - auto idleUntil = generatorConf->idleUntil.getValue(); - const std::string name = generatorConf->name; auto listenerIt = std::find_if(players.begin(), players.end(), @@ -150,7 +151,7 @@ TraceSetup::TraceSetup(const DRAMSysConfiguration::TraceSetup &traceSetup, { if (auto generator = dynamic_cast(initiator.get())) { - if (generator->hasStateTransitionEvent(idleUntil)) + if (generator->hasStateTransitionEvent(*idleUntil)) return true; } @@ -161,7 +162,7 @@ TraceSetup::TraceSetup(const DRAMSysConfiguration::TraceSetup &traceSetup, SC_REPORT_FATAL("TraceSetup", "Event to listen on not found."); auto notifier = dynamic_cast(notifierIt->get()); - listener->waitUntil(¬ifier->getStateTransitionEvent(idleUntil)); + listener->waitUntil(¬ifier->getStateTransitionEvent(*idleUntil)); } } } diff --git a/DRAMSys/simulator/TrafficGenerator.cpp b/DRAMSys/simulator/TrafficGenerator.cpp index bfca8a46..1598a82b 100644 --- a/DRAMSys/simulator/TrafficGenerator.cpp +++ b/DRAMSys/simulator/TrafficGenerator.cpp @@ -93,9 +93,12 @@ void TrafficGeneratorIf::sendNextPayload() TrafficGenerator::TrafficGenerator(const sc_module_name &name, const DRAMSysConfiguration::TraceGenerator &conf, TraceSetup *setup) - : TrafficGeneratorIf(name, setup, evaluateMaxPendingReadRequests(conf), evaluateMaxPendingWriteRequests(conf), evaluateAddLengthConverter(conf)), - generatorClk(TrafficInitiator::evaluateGeneratorClk(conf)), conf(conf), maxTransactions(evaluateMaxTransactions(conf)), - randomGenerator(std::default_random_engine(evaluateSeed(conf))) + : TrafficGeneratorIf(name, setup, conf.maxPendingReadRequests.value_or(defaultMaxPendingReadRequests), + conf.maxPendingWriteRequests.value_or(defaultMaxPendingWriteRequests), + conf.addLengthConverter.value_or(false)), + generatorClk(TrafficInitiator::evaluateGeneratorClk(conf)), conf(conf), + maxTransactions(conf.maxTransactions.value_or(std::numeric_limits::max())), + randomGenerator(std::default_random_engine(conf.seed.value_or(defaultSeed))) { // Perform checks for all states for (const auto &state : conf.states) @@ -118,11 +121,10 @@ TrafficGenerator::TrafficGenerator(const sc_module_name &name, const DRAMSysConf if (rwRatio < 0 || rwRatio > 1) SC_REPORT_FATAL("TraceSetup", "Read/Write ratio is not a number between 0 and 1."); - if (trafficState->notify.isValid()) + if (const auto &eventName = trafficState->notify) { - auto eventName = trafficState->notify.getValue(); - stateTranstitionEvents.emplace(std::piecewise_construct, std::forward_as_tuple(eventName), - std::forward_as_tuple(eventName.c_str(), state.first)); + stateTranstitionEvents.emplace(std::piecewise_construct, std::forward_as_tuple(*eventName), + std::forward_as_tuple(eventName->c_str(), state.first)); } } } @@ -132,7 +134,7 @@ TrafficGenerator::TrafficGenerator(const sc_module_name &name, const DRAMSysConf uint64_t minAddress = evaluateMinAddress(*trafficState); uint64_t maxAddress = evaluateMaxAddress(*trafficState); randomAddressDistribution = std::uniform_int_distribution(minAddress, maxAddress); - currentClksPerRequest = evaluateClksPerRequest(*trafficState); + currentClksPerRequest = trafficState->clksPerRequest.value_or(defaultClksPerRequest); } calculateTransitions(); @@ -265,7 +267,7 @@ void TrafficGenerator::transitionToNextState() uint64_t minAddress = evaluateMinAddress(*trafficState); uint64_t maxAddress = evaluateMaxAddress(*trafficState); randomAddressDistribution = std::uniform_int_distribution(minAddress, maxAddress); - currentClksPerRequest = evaluateClksPerRequest(*trafficState); + currentClksPerRequest = trafficState->clksPerRequest.value_or(defaultClksPerRequest); } currentAddress = 0x00; @@ -329,7 +331,7 @@ uint64_t TrafficGenerator::getNextAddress() if (state->addressDistribution == AddressDistribution::Sequential) { - uint64_t addressIncrement = evaluateAddressIncrement(*state); + uint64_t addressIncrement = state->addressIncrement.value_or(defaultAddressIncrement); uint64_t address = currentAddress; currentAddress += addressIncrement; @@ -347,60 +349,14 @@ uint64_t TrafficGenerator::getNextAddress() } } -uint64_t TrafficGenerator::evaluateSeed(const DRAMSysConfiguration::TraceGenerator &conf) -{ - if (conf.seed.isValid()) - return conf.seed.getValue(); - else - return 0; -} - -uint64_t TrafficGenerator::evaluateMaxTransactions(const DRAMSysConfiguration::TraceGenerator &conf) -{ - if (conf.maxTransactions.isValid()) - return conf.maxTransactions.getValue(); - else - return std::numeric_limits::max(); -} - -bool TrafficGenerator::evaluateAddLengthConverter(const DRAMSysConfiguration::TraceGenerator &conf) -{ - if (conf.addLengthConverter.isValid()) - return conf.addLengthConverter.getValue(); - else - return false; -} - uint64_t TrafficGenerator::evaluateMinAddress(const DRAMSysConfiguration::TraceGeneratorTrafficState &state) { - if (state.minAddress.isValid()) - return state.minAddress.getValue(); - else - return 0x00; + return state.minAddress.value_or(0x00); } uint64_t TrafficGenerator::evaluateMaxAddress(const DRAMSysConfiguration::TraceGeneratorTrafficState &state) { - if (state.maxAddress.isValid()) - return state.maxAddress.getValue(); - else - return Configuration::getInstance().memSpec->getSimMemSizeInBytes() - 1; -} - -uint64_t TrafficGenerator::evaluateAddressIncrement(const DRAMSysConfiguration::TraceGeneratorTrafficState &state) -{ - if (state.addressIncrement.isValid()) - return state.addressIncrement.getValue(); - else - return 0x00; -} - -uint64_t TrafficGenerator::evaluateClksPerRequest(const DRAMSysConfiguration::TraceGeneratorTrafficState &state) -{ - if (state.clksPerRequest.isValid()) - return state.clksPerRequest.getValue(); - else - return 1; + return state.maxAddress.value_or(Configuration::getInstance().memSpec->getSimMemSizeInBytes() - 1); } TrafficGeneratorHammer::TrafficGeneratorHammer(const sc_core::sc_module_name &name, diff --git a/DRAMSys/simulator/TrafficGenerator.h b/DRAMSys/simulator/TrafficGenerator.h index 10f6c66c..e623dd48 100644 --- a/DRAMSys/simulator/TrafficGenerator.h +++ b/DRAMSys/simulator/TrafficGenerator.h @@ -42,6 +42,7 @@ #include "TrafficInitiator.h" #include "TraceSetup.h" +#include #include #include @@ -74,13 +75,8 @@ public: const sc_core::sc_event &getStateTransitionEvent(const std::string &eventName) const; private: - static uint64_t evaluateSeed(const DRAMSysConfiguration::TraceGenerator &conf); - static uint64_t evaluateMaxTransactions(const DRAMSysConfiguration::TraceGenerator &conf); - static bool evaluateAddLengthConverter(const DRAMSysConfiguration::TraceGenerator &conf); static uint64_t evaluateMinAddress(const DRAMSysConfiguration::TraceGeneratorTrafficState &state); static uint64_t evaluateMaxAddress(const DRAMSysConfiguration::TraceGeneratorTrafficState &state); - static uint64_t evaluateAddressIncrement(const DRAMSysConfiguration::TraceGeneratorTrafficState &state); - static uint64_t evaluateClksPerRequest(const DRAMSysConfiguration::TraceGeneratorTrafficState &state); void prepareNextPayload() override; uint64_t getNextAddress() override; @@ -124,6 +120,10 @@ private: std::default_random_engine randomGenerator; std::uniform_real_distribution randomDistribution = std::uniform_real_distribution(0.0f, 1.0f); std::uniform_int_distribution randomAddressDistribution; + + static constexpr uint64_t defaultSeed = 0; + static constexpr uint64_t defaultClksPerRequest = 1; + static constexpr uint64_t defaultAddressIncrement = 0x00; }; class TrafficGeneratorHammer final : public TrafficGeneratorIf diff --git a/DRAMSys/simulator/TrafficInitiator.cpp b/DRAMSys/simulator/TrafficInitiator.cpp index 83449c46..4a2f74af 100644 --- a/DRAMSys/simulator/TrafficInitiator.cpp +++ b/DRAMSys/simulator/TrafficInitiator.cpp @@ -137,18 +137,3 @@ sc_core::sc_time TrafficInitiator::evaluateGeneratorClk(const DRAMSysConfigurati return playerClk; } -unsigned int TrafficInitiator::evaluateMaxPendingReadRequests(const DRAMSysConfiguration::TrafficInitiator &conf) -{ - if (conf.maxPendingReadRequests.isValid()) - return conf.maxPendingReadRequests.getValue(); - else - return 0; -} - -unsigned int TrafficInitiator::evaluateMaxPendingWriteRequests(const DRAMSysConfiguration::TrafficInitiator &conf) -{ - if (conf.maxPendingWriteRequests.isValid()) - return conf.maxPendingWriteRequests.getValue(); - else - return 0; -} diff --git a/DRAMSys/simulator/TrafficInitiator.h b/DRAMSys/simulator/TrafficInitiator.h index c727777d..3b456d29 100644 --- a/DRAMSys/simulator/TrafficInitiator.h +++ b/DRAMSys/simulator/TrafficInitiator.h @@ -64,8 +64,6 @@ public: protected: static sc_core::sc_time evaluateGeneratorClk(const DRAMSysConfiguration::TrafficInitiator &conf); - static unsigned int evaluateMaxPendingReadRequests(const DRAMSysConfiguration::TrafficInitiator &conf); - static unsigned int evaluateMaxPendingWriteRequests(const DRAMSysConfiguration::TrafficInitiator &conf); tlm_utils::peq_with_cb_and_phase payloadEventQueue; void terminate(); @@ -86,6 +84,10 @@ protected: const unsigned int defaultDataLength = 64; const bool storageEnabled = false; + // 0 disables the max value. + static constexpr unsigned int defaultMaxPendingWriteRequests = 0; + static constexpr unsigned int defaultMaxPendingReadRequests = 0; + private: tlm::tlm_sync_enum nb_transport_bw(tlm::tlm_generic_payload &payload, tlm::tlm_phase &phase, sc_core::sc_time &bwDelay); diff --git a/DRAMSys/simulator/main.cpp b/DRAMSys/simulator/main.cpp index 44962562..5fed42be 100644 --- a/DRAMSys/simulator/main.cpp +++ b/DRAMSys/simulator/main.cpp @@ -108,17 +108,17 @@ int sc_main(int argc, char **argv) std::unique_ptr dramSys; #ifdef RECORDING - if (conf.simConfig.databaseRecording.isValid() && conf.simConfig.databaseRecording.getValue()) + if (conf.simConfig.databaseRecording.value_or(false)) dramSys = std::unique_ptr(new DRAMSysRecordable("DRAMSys", conf)); else #endif dramSys = std::unique_ptr(new DRAMSys("DRAMSys", conf)); - if (!conf.traceSetup.isValid()) + if (!conf.traceSetup.has_value()) SC_REPORT_FATAL("sc_main", "No tracesetup section provided."); // Instantiate STL Players: - TraceSetup setup(conf.traceSetup.getValue(), resources, players); + TraceSetup setup(conf.traceSetup.value(), resources, players); // Bind STL Players with DRAMSys: for (auto& player : players) diff --git a/DRAMSys/traceAnalyzer/.directory b/DRAMSys/traceAnalyzer/.directory new file mode 100644 index 00000000..407ff9bc --- /dev/null +++ b/DRAMSys/traceAnalyzer/.directory @@ -0,0 +1,8 @@ +[Dolphin] +Timestamp=2022,2,16,16,1,1.259 +Version=4 +ViewMode=1 +VisibleRoles=Details_text,Details_type,Details_size,Details_modificationtime,CustomizedDetails + +[Settings] +HiddenFilesShown=true diff --git a/DRAMSys/traceAnalyzer/CMakeLists.txt b/DRAMSys/traceAnalyzer/CMakeLists.txt index 5f4ea9bf..3ce4cceb 100644 --- a/DRAMSys/traceAnalyzer/CMakeLists.txt +++ b/DRAMSys/traceAnalyzer/CMakeLists.txt @@ -66,7 +66,7 @@ set(CMAKE_AUTORCC ON) set(CMAKE_INCLUDE_CURRENT_DIR ON) # Configure: -set(CMAKE_CXX_STANDARD 11) +set(CMAKE_CXX_STANDARD 17) set(DCMAKE_SH="CMAKE_SH-NOTFOUND") add_executable(TraceAnalyzer diff --git a/DRAMSys/traceAnalyzer/simulationdialog.cpp b/DRAMSys/traceAnalyzer/simulationdialog.cpp index 218909ce..cc0f6958 100644 --- a/DRAMSys/traceAnalyzer/simulationdialog.cpp +++ b/DRAMSys/traceAnalyzer/simulationdialog.cpp @@ -34,6 +34,7 @@ */ #include "simulationdialog.h" +#include "TraceSetup.h" #include #include @@ -41,6 +42,7 @@ #include #include #include +#include SimulationDialog::SimulationDialog(QWidget *parent) : QWidget(parent), ui(new Ui::SimulationDialog) { @@ -90,8 +92,7 @@ void SimulationDialog::on_browseConfigButton_clicked() void SimulationDialog::on_browseOutputButton_clicked() { - QString fileName = - QFileDialog::getExistingDirectory(this, ui->browseOutputButton->text(), {}); + QString fileName = QFileDialog::getExistingDirectory(this, ui->browseOutputButton->text(), {}); ui->outputDirLineEdit->setText(fileName); loadConfigurationFromPath(); @@ -99,8 +100,7 @@ void SimulationDialog::on_browseOutputButton_clicked() void SimulationDialog::on_browseResourceDirButton_clicked() { - QString fileName = - QFileDialog::getExistingDirectory(this, ui->browseResourceDirButton->text(), {}); + QString fileName = QFileDialog::getExistingDirectory(this, ui->browseResourceDirButton->text(), {}); ui->resourceDirLineEdit->setText(fileName); loadConfigurationFromPath(); @@ -246,8 +246,8 @@ void SimulationDialog::loadConfigurationFromTextFields() MemSpec memSpec; SimConfig simConfig; std::string simulationId; - Optional thermalConfig; - Optional traceSetup; + ThermalConfig thermalConfig; + TraceSetup traceSetup; simulationId = ui->simulationIdLineEdit->text().toStdString(); @@ -259,10 +259,10 @@ void SimulationDialog::loadConfigurationFromTextFields() from_dump(ui->simConfigTextEdit->toPlainText().toStdString(), simConfig); if (!ui->thermalConfigTextEdit->toPlainText().toStdString().empty()) - from_dump(ui->thermalConfigTextEdit->toPlainText().toStdString(), thermalConfig.setByReference()); + from_dump(ui->thermalConfigTextEdit->toPlainText().toStdString(), thermalConfig); if (!ui->traceSetupTextEdit->toPlainText().toStdString().empty()) - from_dump(ui->traceSetupTextEdit->toPlainText().toStdString(), traceSetup.setByReference()); + from_dump(ui->traceSetupTextEdit->toPlainText().toStdString(), traceSetup); } catch (const std::exception &e) { @@ -270,8 +270,13 @@ void SimulationDialog::loadConfigurationFromTextFields() return; } - configuration = DRAMSysConfiguration::Configuration{addressMapping, mcConfig, memSpec, simConfig, - simulationId, thermalConfig, traceSetup}; + configuration = DRAMSysConfiguration::Configuration{addressMapping, + mcConfig, + memSpec, + simConfig, + simulationId, + std::make_optional(std::move(thermalConfig)), + std::make_optional(std::move(traceSetup))}; loadConfiguration(); } @@ -349,9 +354,9 @@ void SimulationDialog::loadThermalConfig() { ui->thermalConfigTextEdit->clear(); - if (configuration.thermalConfig.isValid()) + if (const auto &thermalConfig = configuration.thermalConfig) { - std::string dump = DRAMSysConfiguration::dump(configuration.thermalConfig.getValue(), 4); + std::string dump = DRAMSysConfiguration::dump(*thermalConfig, 4); ui->thermalConfigTextEdit->setText(dump.c_str()); } } @@ -360,9 +365,9 @@ void SimulationDialog::loadTraceSetup() { ui->traceSetupTextEdit->clear(); - if (configuration.traceSetup.isValid()) + if (const auto &traceSetup = configuration.traceSetup) { - std::string dump = DRAMSysConfiguration::dump(configuration.traceSetup.getValue(), 4); + std::string dump = DRAMSysConfiguration::dump(*traceSetup, 4); ui->traceSetupTextEdit->setText(dump.c_str()); } }