From ad6eb6c7a236e78b872ff6cbd43ba9cceff6fbda Mon Sep 17 00:00:00 2001 From: Lukas Steiner Date: Mon, 10 May 2021 15:53:56 +0200 Subject: [PATCH] Adapt bandwidth calculation to OTF burst length selection. --- DRAMSys/library/src/controller/Controller.cpp | 2 +- DRAMSys/library/src/controller/ControllerIF.h | 5 +- .../src/controller/ControllerRecordable.cpp | 6 +- .../src/controller/ControllerRecordable.h | 7 +- .../src/controller/checker/CheckerDDR5.cpp | 76 +++++++++---------- .../src/controller/checker/CheckerDDR5.h | 4 +- DRAMSys/simulator/StlPlayer.cpp | 4 +- DRAMSys/simulator/StlPlayer.h | 2 +- 8 files changed, 52 insertions(+), 54 deletions(-) diff --git a/DRAMSys/library/src/controller/Controller.cpp b/DRAMSys/library/src/controller/Controller.cpp index 29269952..45b04c39 100644 --- a/DRAMSys/library/src/controller/Controller.cpp +++ b/DRAMSys/library/src/controller/Controller.cpp @@ -438,9 +438,9 @@ void Controller::manageResponses() NDEBUG_UNUSED(uint64_t id) = DramExtension::getChannelPayloadID(transToRelease.payload); PRINTDEBUGMESSAGE(name(), "Payload " + std::to_string(id) + " left system."); + numberOfBeatsServed += DramExtension::getBurstLength(transToRelease.payload); transToRelease.payload->release(); transToRelease.payload = nullptr; - numberOfTransactionsServed++; totalNumberOfPayloads--; if (totalNumberOfPayloads == 0) diff --git a/DRAMSys/library/src/controller/ControllerIF.h b/DRAMSys/library/src/controller/ControllerIF.h index b23c3a2e..aebae208 100644 --- a/DRAMSys/library/src/controller/ControllerIF.h +++ b/DRAMSys/library/src/controller/ControllerIF.h @@ -55,8 +55,7 @@ public: // Destructor virtual ~ControllerIF() { - sc_time activeTime = numberOfTransactionsServed - * Configuration::getInstance().memSpec->burstLength + sc_time activeTime = numberOfBeatsServed / Configuration::getInstance().memSpec->dataRate * Configuration::getInstance().memSpec->tCK; @@ -143,7 +142,7 @@ protected: sc_time idleStart; } idleTimeCollector; - uint64_t numberOfTransactionsServed = 0; + uint64_t numberOfBeatsServed = 0; }; diff --git a/DRAMSys/library/src/controller/ControllerRecordable.cpp b/DRAMSys/library/src/controller/ControllerRecordable.cpp index 243d43e5..34350af4 100644 --- a/DRAMSys/library/src/controller/ControllerRecordable.cpp +++ b/DRAMSys/library/src/controller/ControllerRecordable.cpp @@ -130,9 +130,9 @@ void ControllerRecordable::controllerMethod() Controller::controllerMethod(); - uint64_t windowNumberOfTransactionsServed = numberOfTransactionsServed - lastNumberOfTransactionsServed; - lastNumberOfTransactionsServed = numberOfTransactionsServed; - sc_time windowActiveTime = windowNumberOfTransactionsServed * activeTimeMultiplier; + uint64_t windowNumberOfBeatsServed = numberOfBeatsServed - lastNumberOfBeatsServed; + lastNumberOfBeatsServed = numberOfBeatsServed; + sc_time windowActiveTime = windowNumberOfBeatsServed * activeTimeMultiplier; double windowAverageBandwidth = windowActiveTime / windowSizeTime; tlmRecorder->recordBandwidth(sc_time_stamp().to_seconds(), windowAverageBandwidth); } diff --git a/DRAMSys/library/src/controller/ControllerRecordable.h b/DRAMSys/library/src/controller/ControllerRecordable.h index c2efa334..9459cd12 100644 --- a/DRAMSys/library/src/controller/ControllerRecordable.h +++ b/DRAMSys/library/src/controller/ControllerRecordable.h @@ -66,10 +66,9 @@ private: std::vector windowAverageBufferDepth; sc_time lastTimeCalled = SC_ZERO_TIME; - uint64_t lastNumberOfTransactionsServed = 0; - sc_time activeTimeMultiplier = Configuration::getInstance().memSpec->burstLength - / Configuration::getInstance().memSpec->dataRate - * Configuration::getInstance().memSpec->tCK; + uint64_t lastNumberOfBeatsServed = 0; + sc_time activeTimeMultiplier = Configuration::getInstance().memSpec->tCK + / Configuration::getInstance().memSpec->dataRate; }; #endif // CONTROLLERRECORDABLE_H diff --git a/DRAMSys/library/src/controller/checker/CheckerDDR5.cpp b/DRAMSys/library/src/controller/checker/CheckerDDR5.cpp index 67ee3b73..353c4ebf 100644 --- a/DRAMSys/library/src/controller/checker/CheckerDDR5.cpp +++ b/DRAMSys/library/src/controller/checker/CheckerDDR5.cpp @@ -41,7 +41,7 @@ CheckerDDR5::CheckerDDR5() if (memSpec == nullptr) SC_REPORT_FATAL("CheckerDDR5", "Wrong MemSpec chosen"); - lastScheduledByCommandAndDIMMRank = std::vector> + lastScheduledByCommandAndDimmRank = std::vector> (numberOfCommands(), std::vector(memSpec->numberOfDIMMRanks, sc_max_time())); lastScheduledByCommandAndPhysicalRank = std::vector> (numberOfCommands(), std::vector(memSpec->numberOfPhysicalRanks, sc_max_time())); @@ -59,7 +59,7 @@ CheckerDDR5::CheckerDDR5() last4ActivatesLogical = std::vector>(memSpec->numberOfLogicalRanks); last4ActivatesPhysical = std::vector>(memSpec->numberOfPhysicalRanks); - lastBurstLengthByCommandAndDIMMRank = std::vector> + lastBurstLengthByCommandAndDimmRank = std::vector> (4, std::vector(memSpec->numberOfDIMMRanks)); lastBurstLengthByCommandAndPhysicalRank = std::vector> (4, std::vector(memSpec->numberOfPhysicalRanks)); @@ -158,9 +158,9 @@ sc_time CheckerDDR5::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::RD]; if (lastCommandStart != lastScheduledByCommandAndPhysicalRank[Command::RD][physicalrank.ID()]) { - if (lastCommandStart == lastScheduledByCommandAndDIMMRank[Command::RD][dimmrank.ID()]) + if (lastCommandStart == lastScheduledByCommandAndDimmRank[Command::RD][dimmrank.ID()]) { - if (lastBurstLengthByCommandAndDIMMRank[Command::RD][dimmrank.ID()] == 32) + if (lastBurstLengthByCommandAndDimmRank[Command::RD][dimmrank.ID()] == 32) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDRD_dpr + tRD_BURST); // 16 tCK + tRTRS else earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDRD_dpr); // 16 tCK + tRTRS @@ -204,9 +204,9 @@ sc_time CheckerDDR5::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::RDA]; if (lastCommandStart != lastScheduledByCommandAndPhysicalRank[Command::RDA][physicalrank.ID()]) { - if (lastCommandStart == lastScheduledByCommandAndDIMMRank[Command::RDA][dimmrank.ID()]) + if (lastCommandStart == lastScheduledByCommandAndDimmRank[Command::RDA][dimmrank.ID()]) { - if (lastBurstLengthByCommandAndDIMMRank[Command::RDA][dimmrank.ID()] == 32) + if (lastBurstLengthByCommandAndDimmRank[Command::RDA][dimmrank.ID()] == 32) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDRD_dpr + tRD_BURST); // 16 tCK + tRTRS else earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDRD_dpr); // 16 tCK + tRTRS @@ -262,9 +262,9 @@ sc_time CheckerDDR5::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::WR]; if (lastCommandStart != lastScheduledByCommandAndPhysicalRank[Command::WR][physicalrank.ID()]) { - if (lastCommandStart == lastScheduledByCommandAndDIMMRank[Command::WR][dimmrank.ID()]) + if (lastCommandStart == lastScheduledByCommandAndDimmRank[Command::WR][dimmrank.ID()]) { - if (lastBurstLengthByCommandAndDIMMRank[Command::WR][dimmrank.ID()] == 32) + if (lastBurstLengthByCommandAndDimmRank[Command::WR][dimmrank.ID()] == 32) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_dpr + tWR_BURST); // + 8 tCK else earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_dpr); // + 8 tCK @@ -308,9 +308,9 @@ sc_time CheckerDDR5::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::WRA]; if (lastCommandStart != lastScheduledByCommandAndPhysicalRank[Command::WRA][physicalrank.ID()]) { - if (lastCommandStart == lastScheduledByCommandAndDIMMRank[Command::WRA][dimmrank.ID()]) + if (lastCommandStart == lastScheduledByCommandAndDimmRank[Command::WRA][dimmrank.ID()]) { - if (lastBurstLengthByCommandAndDIMMRank[Command::WRA][dimmrank.ID()] == 32) + if (lastBurstLengthByCommandAndDimmRank[Command::WRA][dimmrank.ID()] == 32) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_dpr + tWR_BURST); // + 8 tCK else earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRRD_dpr); // + 8 tCK @@ -360,9 +360,9 @@ sc_time CheckerDDR5::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::RD]; if (lastCommandStart != lastScheduledByCommandAndPhysicalRank[Command::RD][physicalrank.ID()]) { - if (lastCommandStart == lastScheduledByCommandAndDIMMRank[Command::RD][dimmrank.ID()]) + if (lastCommandStart == lastScheduledByCommandAndDimmRank[Command::RD][dimmrank.ID()]) { - if (lastBurstLengthByCommandAndDIMMRank[Command::RD][dimmrank.ID()] == 32) + if (lastBurstLengthByCommandAndDimmRank[Command::RD][dimmrank.ID()] == 32) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_dpr + tRD_BURST); // + 8 tCK else earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_dpr); // + 8 tCK @@ -406,9 +406,9 @@ sc_time CheckerDDR5::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::RDA]; if (lastCommandStart != lastScheduledByCommandAndPhysicalRank[Command::RDA][physicalrank.ID()]) { - if (lastCommandStart == lastScheduledByCommandAndDIMMRank[Command::RDA][dimmrank.ID()]) + if (lastCommandStart == lastScheduledByCommandAndDimmRank[Command::RDA][dimmrank.ID()]) { - if (lastBurstLengthByCommandAndDIMMRank[Command::RDA][dimmrank.ID()] == 32) + if (lastBurstLengthByCommandAndDimmRank[Command::RDA][dimmrank.ID()] == 32) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_dpr + tRD_BURST); // + 8 tCK else earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tRDWR_dpr); // + 8 tCK @@ -462,9 +462,9 @@ sc_time CheckerDDR5::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::WR]; if (lastCommandStart != lastScheduledByCommandAndPhysicalRank[Command::WR][physicalrank.ID()]) { - if (lastCommandStart == lastScheduledByCommandAndDIMMRank[Command::WR][dimmrank.ID()]) + if (lastCommandStart == lastScheduledByCommandAndDimmRank[Command::WR][dimmrank.ID()]) { - if (lastBurstLengthByCommandAndDIMMRank[Command::WR][dimmrank.ID()] == 32) + if (lastBurstLengthByCommandAndDimmRank[Command::WR][dimmrank.ID()] == 32) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRWR_dpr + tWR_BURST); // + 8 tCK else earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRWR_dpr); // + 8 tCK @@ -518,9 +518,9 @@ sc_time CheckerDDR5::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::WRA]; if (lastCommandStart != lastScheduledByCommandAndPhysicalRank[Command::WRA][physicalrank.ID()]) { - if (lastCommandStart == lastScheduledByCommandAndDIMMRank[Command::WRA][dimmrank.ID()]) + if (lastCommandStart == lastScheduledByCommandAndDimmRank[Command::WRA][dimmrank.ID()]) { - if (lastBurstLengthByCommandAndDIMMRank[Command::WRA][dimmrank.ID()] == 32) + if (lastBurstLengthByCommandAndDimmRank[Command::WRA][dimmrank.ID()] == 32) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRWR_dpr + tWR_BURST); // + 8 tCK else earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRWR_dpr); // + 8 tCK @@ -755,7 +755,7 @@ sc_time CheckerDDR5::timeToSatisfyConstraints(Command command, Rank rank, BankGr if (lastCommandStart != sc_max_time()) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFC_dlr); - lastCommandStart = lastScheduledByCommandAndDIMMRank[Command::REFA][dimmrank.ID()]; + lastCommandStart = lastScheduledByCommandAndDimmRank[Command::REFA][dimmrank.ID()]; if (lastCommandStart != sc_max_time()) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFC_dpr); @@ -805,7 +805,7 @@ sc_time CheckerDDR5::timeToSatisfyConstraints(Command command, Rank rank, BankGr earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFC_dlr); // TODO: check this - lastCommandStart = lastScheduledByCommandAndDIMMRank[Command::REFA][dimmrank.ID()]; + lastCommandStart = lastScheduledByCommandAndDimmRank[Command::REFA][dimmrank.ID()]; if (lastCommandStart != sc_max_time()) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFC_dpr); @@ -839,41 +839,41 @@ void CheckerDDR5::insert(Command command, Rank rank, BankGroup bankgroup, Bank b PRINTDEBUGMESSAGE("CheckerDDR5", "Changing state on bank " + std::to_string(bank.ID()) + " command is " + commandToString(command)); - Rank logicalrank = rank; - Rank physicalrank = Rank(logicalrank.ID() / memSpec->logicalRanksPerPhysicalRank); - Rank dimmrank = Rank(physicalrank.ID() / memSpec->physicalRanksPerDIMMRank); - Bank bankingroup = Bank(rank.ID() * memSpec->banksPerGroup + bank.ID() % memSpec->banksPerGroup); + Rank logicalRank = rank; + Rank physicalRank = Rank(logicalRank.ID() / memSpec->logicalRanksPerPhysicalRank); + Rank dimmRank = Rank(physicalRank.ID() / memSpec->physicalRanksPerDIMMRank); + Bank bankInGroup = Bank(rank.ID() * memSpec->banksPerGroup + bank.ID() % memSpec->banksPerGroup); - lastScheduledByCommandAndDIMMRank[command][dimmrank.ID()] = sc_time_stamp(); - lastScheduledByCommandAndPhysicalRank[command][physicalrank.ID()] = sc_time_stamp(); - lastScheduledByCommandAndLogicalRank[command][logicalrank.ID()] = sc_time_stamp(); + lastScheduledByCommandAndDimmRank[command][dimmRank.ID()] = sc_time_stamp(); + lastScheduledByCommandAndPhysicalRank[command][physicalRank.ID()] = sc_time_stamp(); + lastScheduledByCommandAndLogicalRank[command][logicalRank.ID()] = sc_time_stamp(); lastScheduledByCommandAndBankGroup[command][bankgroup.ID()] = sc_time_stamp(); lastScheduledByCommandAndBank[command][bank.ID()] = sc_time_stamp(); lastScheduledByCommand[command] = sc_time_stamp(); lastCommandOnBus = sc_time_stamp() + memSpec->getCommandLength(command) - memSpec->tCK; - lastScheduledByCommandAndBankInGroup[command][bankingroup.ID()] = sc_time_stamp(); + lastScheduledByCommandAndBankInGroup[command][bankInGroup.ID()] = sc_time_stamp(); if (isCasCommand(command)) { - lastBurstLengthByCommandAndDIMMRank[command][dimmrank.ID()] = burstLength; - lastBurstLengthByCommandAndPhysicalRank[command][physicalrank.ID()] = burstLength; - lastBurstLengthByCommandAndLogicalRank[command][logicalrank.ID()] = burstLength; + lastBurstLengthByCommandAndDimmRank[command][dimmRank.ID()] = burstLength; + lastBurstLengthByCommandAndPhysicalRank[command][physicalRank.ID()] = burstLength; + lastBurstLengthByCommandAndLogicalRank[command][logicalRank.ID()] = burstLength; lastBurstLengthByCommandAndBankGroup[command][bankgroup.ID()] = burstLength; lastBurstLengthByCommandAndBank[command][bank.ID()] = burstLength; lastBurstLengthByCommand[command] = burstLength; - lastBurstLengthByCommandAndBankInGroup[command][bankingroup.ID()] = burstLength; + lastBurstLengthByCommandAndBankInGroup[command][bankInGroup.ID()] = burstLength; } if (command == Command::ACT || command == Command::REFSB) { - if (last4ActivatesLogical[logicalrank.ID()].size() == 4) - last4ActivatesLogical[logicalrank.ID()].pop(); - last4ActivatesLogical[logicalrank.ID()].push(lastCommandOnBus); + if (last4ActivatesLogical[logicalRank.ID()].size() == 4) + last4ActivatesLogical[logicalRank.ID()].pop(); + last4ActivatesLogical[logicalRank.ID()].push(lastCommandOnBus); - if (last4ActivatesPhysical[physicalrank.ID()].size() == 4) - last4ActivatesPhysical[physicalrank.ID()].pop(); - last4ActivatesPhysical[physicalrank.ID()].push(lastCommandOnBus); + if (last4ActivatesPhysical[physicalRank.ID()].size() == 4) + last4ActivatesPhysical[physicalRank.ID()].pop(); + last4ActivatesPhysical[physicalRank.ID()].push(lastCommandOnBus); } } diff --git a/DRAMSys/library/src/controller/checker/CheckerDDR5.h b/DRAMSys/library/src/controller/checker/CheckerDDR5.h index ace723e4..263791f9 100644 --- a/DRAMSys/library/src/controller/checker/CheckerDDR5.h +++ b/DRAMSys/library/src/controller/checker/CheckerDDR5.h @@ -52,7 +52,7 @@ public: private: const MemSpecDDR5 *memSpec; - std::vector> lastScheduledByCommandAndDIMMRank; + std::vector> lastScheduledByCommandAndDimmRank; std::vector> lastScheduledByCommandAndPhysicalRank; std::vector> lastScheduledByCommandAndLogicalRank; std::vector> lastScheduledByCommandAndBankGroup; @@ -65,7 +65,7 @@ private: std::vector> last4ActivatesPhysical; std::vector> last4ActivatesLogical; - std::vector> lastBurstLengthByCommandAndDIMMRank; + std::vector> lastBurstLengthByCommandAndDimmRank; std::vector> lastBurstLengthByCommandAndPhysicalRank; std::vector> lastBurstLengthByCommandAndLogicalRank; std::vector> lastBurstLengthByCommandAndBankGroup; diff --git a/DRAMSys/simulator/StlPlayer.cpp b/DRAMSys/simulator/StlPlayer.cpp index 4880b5b0..337480a3 100644 --- a/DRAMSys/simulator/StlPlayer.cpp +++ b/DRAMSys/simulator/StlPlayer.cpp @@ -55,7 +55,7 @@ StlPlayer::StlPlayer(sc_module_name name, SC_REPORT_FATAL("StlPlayer", (std::string("Could not open trace ") + pathToTrace).c_str()); this->playerClk = playerClk; - burstlength = Configuration::getInstance().memSpec->burstLength; + burstLength = Configuration::getInstance().memSpec->burstLength; dataLength = Configuration::getInstance().memSpec->bytesPerBurst; lineCnt = 0; @@ -96,7 +96,7 @@ void StlPlayer::nextPayload() payload->set_response_status(TLM_INCOMPLETE_RESPONSE); payload->set_dmi_allowed(false); payload->set_byte_enable_length(0); - payload->set_streaming_width(burstlength); + payload->set_streaming_width(burstLength); payload->set_data_length(dataLength); payload->set_command(lineIterator->cmd); std::copy(lineIterator->data.begin(), lineIterator->data.end(), payload->get_data_ptr()); diff --git a/DRAMSys/simulator/StlPlayer.h b/DRAMSys/simulator/StlPlayer.h index 27081d41..cacf37bf 100644 --- a/DRAMSys/simulator/StlPlayer.h +++ b/DRAMSys/simulator/StlPlayer.h @@ -75,7 +75,7 @@ private: std::ifstream file; uint64_t lineCnt; - unsigned int burstlength; + unsigned int burstLength; unsigned int dataLength; sc_time playerClk; // May be different from the memory clock!