diff --git a/DRAMSys/tests/DDR4/configs/memspecs/MICRON_4Gb_DDR4-1866_8bit_A.json b/DRAMSys/tests/DDR4/configs/memspecs/MICRON_4Gb_DDR4-1866_8bit_A.json
index adbfd117..38a5701a 100644
--- a/DRAMSys/tests/DDR4/configs/memspecs/MICRON_4Gb_DDR4-1866_8bit_A.json
+++ b/DRAMSys/tests/DDR4/configs/memspecs/MICRON_4Gb_DDR4-1866_8bit_A.json
@@ -65,4 +65,4 @@
             "clkMhz": 933
         }
     }
-}
\ No newline at end of file
+}
diff --git a/DRAMSys/tests/DDR4/configs/simulator/ddr4.json b/DRAMSys/tests/DDR4/configs/simulator/ddr4.json
index 05cd86e2..c88964d3 100644
--- a/DRAMSys/tests/DDR4/configs/simulator/ddr4.json
+++ b/DRAMSys/tests/DDR4/configs/simulator/ddr4.json
@@ -8,7 +8,7 @@
         "EnableWindowing": false,
         "ErrorCSVFile": "",
         "ErrorChipSeed": 42,
-        "PowerAnalysis": false,
+        "PowerAnalysis": true,
         "SimulationName": "ddr4",
         "SimulationProgressBar": true,
         "StoreMode": "NoStorage",
diff --git a/DRAMSys/tests/ddr3_multirank/configs/simulator/ddr3.json b/DRAMSys/tests/ddr3_multirank/configs/simulator/ddr3.json
index 99ccdb45..1ade5aea 100644
--- a/DRAMSys/tests/ddr3_multirank/configs/simulator/ddr3.json
+++ b/DRAMSys/tests/ddr3_multirank/configs/simulator/ddr3.json
@@ -8,7 +8,7 @@
         "EnableWindowing": false,
         "ErrorCSVFile": "",
         "ErrorChipSeed": 42,
-        "PowerAnalysis": false,
+        "PowerAnalysis": true,
         "SimulationName": "ddr3",
         "SimulationProgressBar": true,
         "StoreMode": "NoStorage",