diff --git a/DRAMSys/docs/images/PayloadExtension.svg b/DRAMSys/docs/images/PayloadExtension.svg new file mode 100644 index 00000000..fd0cb966 --- /dev/null +++ b/DRAMSys/docs/images/PayloadExtension.svg @@ -0,0 +1,2449 @@ + + + +Trace +file n +Trace +file +1 +Trace Player +1 +Trace Player n +Arbiter +Controller +Scheduler +ControllerCore +Controller +Scheduler +ControllerCore +DRAM +DRAM +GenerationExtension +sc +_ +time +( +timeOfGeneration +) +Generic Payload +Command +Address +Data pointer +Data length +Byte enable pointer +Byte enable length +Streaming width +DMI hint +Response status +Generic Payload +Command +Address +Data pointer +Data length +Byte enable pointer +Byte enable length +Streaming width +DMI hint +Response status +GenerationExtension +sc +_ +time +( +timeOfGeneration +) +DramExtension +Thread +Chanel +Bank +BankGroup +Row +Column +Burstlength +Generic Payload +Command +Address +Data pointer +Data length +Byte enable pointer +Byte enable length +Streaming width +DMI hint +Response status +GenerationExtension +sc +_ +time +( +timeOfGeneration +) +DramExtension +Thread +Chanel +Bank +BankGroup +Row +Column +Burstlength +Generic Payload +Command +Address +Data pointer +Data length +Byte enable pointer +Byte enable length +Streaming width +DMI hint +Response status +GenerationExtension +sc +_ +time +( +timeOfGeneration +) +DramExtension +Thread +Chanel +Bank +BankGroup +Row +Column +Burstlength + \ No newline at end of file diff --git a/DRAMSys/docs/images/PayloadMemoryManager.svg b/DRAMSys/docs/images/PayloadMemoryManager.svg new file mode 100644 index 00000000..3cf9fd46 --- /dev/null +++ b/DRAMSys/docs/images/PayloadMemoryManager.svg @@ -0,0 +1,988 @@ + + + +TracePlayer +BEGIN +_ +REQ +BEGIN +_ +REQ +END +_ +REQ +END +_ +REQ +BEGIN +_ +PRE +END +_ +PRE +BEGIN +_ +ACT +END +_ +ACT +BEGIN +_ +RD or BEGIN +_ +WR +END +_ +RD or END +_ +WR +BEGIN +_ +RESP +BEGIN +_ +RESP +END +_ +RESP +END +_ +RESP +Arbiter +Controller +DRAM +Allocate Payload +acquire +() +Set auto extension +( +GenerationExtension +) +acquire +() +Set auto extension +( +DramExtension +) +Get extension DramExtension +: +getBank +, +getRow +Get extension +DramExtension +: +getThread +Get extension +DramExtension +: +getBank +acquire +() +Get extension +DramExtension +: +getRow +release +() +release +() +release +() + \ No newline at end of file diff --git a/DRAMSys/docs/images/TransactionPhase.svg b/DRAMSys/docs/images/TransactionPhase.svg new file mode 100644 index 00000000..4a2973f4 --- /dev/null +++ b/DRAMSys/docs/images/TransactionPhase.svg @@ -0,0 +1,2026 @@ + + + +PEQFrontEnd +Scheduler +rowBufferIsOpen +( +Bank +) +Command +:: +Activate +FALSE +RowInRowBuffer += +getRow +( +Payload +) +TRUE +Command +:: +Precharge +FALSE +Command +:: +READ +Command +:: +WRITE +TRUE +& +READ +_ +COMMAND +TRUE +& +WRITE +_ +COMMAND +BEGIN +_ +ACT +BEGIN +_ +PRE +BEGIN +_ +RD +BEGIN +_ +WR +ControllerCore +( +PowerDownManager +, +RefreshManager +) +ControllerCorePEQ +Initiator Socket +Target Socket +Receive +nb +_ +transport +_ +fw +END +_ +ACT +END +_ +PRE +END +_ +RD +END +_ +WR +BEGIN +_ +ACT +BEGIN +_ +PRE +BEGIN +_ +RD +BEGIN +_ +WR +DramPEQ +nb +_ +transport +_ +bw +Controller +DRAM +Target Socket +nb +_ +transport +_ +fw +nb +_ +transport +_ +bw +From +/ +to Arbiter +END +_ +RD or END +_ +WR +END +_ +ACT or END +_ +PRE + \ No newline at end of file diff --git a/README.md b/README.md index d2330084..c2949924 100644 --- a/README.md +++ b/README.md @@ -804,6 +804,24 @@ A description of the content each directory follows. - **traces**: trace files for simulations. They contain accesses to memory in certain known scenarios. +#### DRAMsys Diagrams + +- **Payload Extension information** + + GenerationExtension is added in TracePlayer and DramExtension is added in Arbiter. + + ![Payload Extension information](DRAMSys/docs/images/PayloadExtension.png) + +- **Transaction object with Memory Manager** + + The acquire method is called before passing the transaction object and the release method is called after the component is done with the transaction object. + + ![Payload Memory Manager](DRAMSys/docs/images/PayloadMemoryManager.png) + +- **Architecture of the backend TLM model** + + ![Architecture backend TLM](DRAMSys/docs/images/TransactionPhase.png) + #### References [1] TLM Modelling of 3D Stacked Wide I/O DRAM Subsystems, A Virtual Platform for Memory Controller Design Space Exploration