From a944d0eeffe8751928082c61e0b070b93c09ba85 Mon Sep 17 00:00:00 2001 From: Derek Christ Date: Mon, 23 May 2022 17:08:32 +0200 Subject: [PATCH] Fix issuance of commands in half-cylces in HBM3 --- DRAMSys/library/src/controller/checker/CheckerHBM3.cpp | 10 ++++++++++ DRAMSys/library/src/controller/checker/CheckerHBM3.h | 2 ++ 2 files changed, 12 insertions(+) diff --git a/DRAMSys/library/src/controller/checker/CheckerHBM3.cpp b/DRAMSys/library/src/controller/checker/CheckerHBM3.cpp index 22da1b76..9ff9a0c7 100644 --- a/DRAMSys/library/src/controller/checker/CheckerHBM3.cpp +++ b/DRAMSys/library/src/controller/checker/CheckerHBM3.cpp @@ -760,6 +760,10 @@ sc_time CheckerHBM3::timeToSatisfyConstraints(Command command, const tlm_generic SC_REPORT_FATAL("CheckerHBM3", "Unknown command!"); } + // Don't issue commands at half cycles. + if (command != Command::PREAB && command != Command::PREPB && !isFullCycle(earliestTimeToStart)) + earliestTimeToStart += memSpec->tCK / 2; + return earliestTimeToStart; } @@ -794,3 +798,9 @@ void CheckerHBM3::insert(Command command, const tlm_generic_payload &payload) if (command == Command::REFPB) bankwiseRefreshCounter[rank.ID()] = (bankwiseRefreshCounter[rank.ID()] + 1) % memSpec->banksPerRank; } + +bool CheckerHBM3::isFullCycle(const sc_core::sc_time& time) const +{ + sc_time aligedAtHalfCycle = std::floor((time * 2 / memSpec->tCK + 0.5)) / 2 * memSpec->tCK; + return aligedAtHalfCycle % memSpec->tCK == SC_ZERO_TIME; +} diff --git a/DRAMSys/library/src/controller/checker/CheckerHBM3.h b/DRAMSys/library/src/controller/checker/CheckerHBM3.h index 7b6bece9..8bd4423d 100644 --- a/DRAMSys/library/src/controller/checker/CheckerHBM3.h +++ b/DRAMSys/library/src/controller/checker/CheckerHBM3.h @@ -50,6 +50,8 @@ public: void insert(Command command, const tlm::tlm_generic_payload& payload) override; private: + bool isFullCycle(const sc_core::sc_time& time) const; + const MemSpecHBM3 *memSpec; std::vector> lastScheduledByCommandAndBank;