From 9fc226c83eee5cc165b3dfd7e3ef3d293a21a4d1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=C3=89der=20F=2E=20Zulian?= <zulian@eit.uni-kl.de>
Date: Wed, 9 Nov 2016 22:26:37 +0100
Subject: [PATCH] Single device simulation files.

The files added can be used to simulate a single 1Gbx8 DDR3-SDRAM device.
For more details refer to the files.
---
 .../amconfigs/am_ddr3_1Gbx8_p1KB_brc.xml      | 22 +++++++
 DRAMSys/simulator/resources/resources.pri     |  5 +-
 .../simulations/ddr3-single-device.xml        | 58 +++++++++++++++++++
 .../core/configuration/Configuration.cpp      | 10 ++--
 4 files changed, 88 insertions(+), 7 deletions(-)
 create mode 100644 DRAMSys/simulator/resources/configs/amconfigs/am_ddr3_1Gbx8_p1KB_brc.xml
 create mode 100644 DRAMSys/simulator/resources/simulations/ddr3-single-device.xml

diff --git a/DRAMSys/simulator/resources/configs/amconfigs/am_ddr3_1Gbx8_p1KB_brc.xml b/DRAMSys/simulator/resources/configs/amconfigs/am_ddr3_1Gbx8_p1KB_brc.xml
new file mode 100644
index 00000000..a508caa7
--- /dev/null
+++ b/DRAMSys/simulator/resources/configs/amconfigs/am_ddr3_1Gbx8_p1KB_brc.xml
@@ -0,0 +1,22 @@
+<!--
+DDR3-SDRAM 1Gbit x8 (single device, e.g. Micron MT41J128M8) with Page Size: 1KB
+
+Addressing:
+
+Row addressing:   16K (A[13:0]) -> 14 bits
+Bank addressing:    8 (BA[2:0]) -> 3 bits
+Column addressing: 1K (A[9:0]   -> 10 bits
+
+2 2 2 | 2 2 2 2 1 1 1 1 1 1 1 1 1 1 |
+6 5 4 | 3 2 1 0 9 8 7 6 5 4 3 2 1 0 | 9 8 7 6 5 4 3 2 1 0 |
+B B B | R R R R R R R R R R R R R R | C C C C C C C C C C |
+
+-->
+
+<addressmapping>
+    <channel from="128" to="128" /> <!-- workaround to have only one channel -->
+    <bank    from="24"  to="26"  />
+    <row     from="10"  to="23"  />
+    <column  from="0"   to="9"   />
+</addressmapping>
+
diff --git a/DRAMSys/simulator/resources/resources.pri b/DRAMSys/simulator/resources/resources.pri
index bd1a5c7a..c647763a 100644
--- a/DRAMSys/simulator/resources/resources.pri
+++ b/DRAMSys/simulator/resources/resources.pri
@@ -4,6 +4,7 @@
 # simulation files
 OTHER_FILES += resources/simulations/sim-batch.xml    
 OTHER_FILES += resources/simulations/ddr3-example.xml
+OTHER_FILES += resources/simulations/ddr3-single-device.xml
 
 # scripts
 OTHER_FILES += resources/scripts/address_scrambler.pl
@@ -49,6 +50,7 @@ OTHER_FILES += resources/traces/small.stl
 OTHER_FILES += resources/traces/chstone-motion_32.stl
 OTHER_FILES += resources/traces/mediabench-adpcmdecode_32.stl
 OTHER_FILES += resources/traces/ddr3_example.stl
+OTHER_FILES += resources/traces/ddr3_single_dev_example.stl
 
 # mcconfigs
 OTHER_FILES += resources/configs/mcconfigs/fifoStrict.xml
@@ -102,8 +104,6 @@ OTHER_FILES += resources/configs/memspecs/MICRON_4Gb_LPDDR3-1333_32bit_A.xml
 OTHER_FILES += resources/configs/memspecs/MICRON_4Gb_LPDDR3-1600_32bit_A.xml
 OTHER_FILES += resources/configs/memspecs/SAMSUNG_K4B1G1646E_1Gb_DDR3-1600_16bit.xml
 
-
-
 # address mapping configs
 OTHER_FILES += resources/configs/amconfigs/am_ddr3.xml
 OTHER_FILES += resources/configs/amconfigs/am_ddr3_x16_brc.xml
@@ -119,6 +119,7 @@ OTHER_FILES += resources/configs/amconfigs/am_wideio.xml
 OTHER_FILES += resources/configs/amconfigs/am_lowHits.xml
 OTHER_FILES += resources/configs/amconfigs/am_lowPara.xml
 OTHER_FILES += resources/configs/amconfigs/am_wideioFourBanks.xml
+OTHER_FILES += resources/configs/amconfigs/am_ddr3_1Gbx8_p1KB_brc.xml
 
 # thermal simulation configs
 OTHER_FILES += resources/configs/thermalsim/core.flp
diff --git a/DRAMSys/simulator/resources/simulations/ddr3-single-device.xml b/DRAMSys/simulator/resources/simulations/ddr3-single-device.xml
new file mode 100644
index 00000000..e6653583
--- /dev/null
+++ b/DRAMSys/simulator/resources/simulations/ddr3-single-device.xml
@@ -0,0 +1,58 @@
+<simulation>
+    <!-- General Simulator Configuration (used for all simulation setups) -->
+    <simconfig>
+        <Debug value="0" />
+        <DatabaseRecording value="1" />
+        <PowerAnalysis value="1" />
+        <EnableWindowing value = "1" />
+        <WindowSize value="100" />
+        <NumberOfTracePlayers value="1"/>
+        <NumberOfMemChannels value="1"/>
+        <ControllerCoreDisableRefresh value="0"/>
+        <ThermalSimulation value="0"/>
+        <SimulationProgressBar value="1"/>
+        <NumberOfDevicesOnDIMM value = "1" />
+    </simconfig>
+
+    <!-- Temperature Simulator Configuration (used for all simulation setups) -->
+    <thermalsimconfig>
+        <TemperatureScale value="Celsius" />
+        <StaticTemperatureDefaultValue value="89" />
+        <ThermalSimPeriod value="100" />
+        <ThermalSimUnit value="us" />
+        <PowerInfoFile value="../../DRAMSys/simulator/resources/configs/thermalsim/powerInfo.xml"/>
+        <IceServerIp value="127.0.0.1" />
+        <IceServerPort value="11880" />
+        <SimPeriodAdjustFactor value="10" />
+        <NPowStableCyclesToIncreasePeriod value="5" />
+        <GenerateTemperatureMap value="1" />
+        <GeneratePowerMap value="1" />
+    </thermalsimconfig>
+
+
+    <!-- Memory Device Specification: Which Device is on our simulated DDR3 DIMM -->
+    <memspecs>
+        <memspec src="../../DRAMSys/simulator/resources/configs/memspecs/MICRON_1Gb_DDR3-1600_8bit_G.xml"></memspec>
+    </memspecs>
+
+    <!-- Addressmapping Configuration of the Memory Controller -->
+    <addressmappings>
+        <addressmapping src="../../DRAMSys/simulator/resources/configs/amconfigs/am_ddr3_1Gbx8_p1KB_brc.xml"></addressmapping>
+    </addressmappings>
+
+
+    <!-- Memory Controller Configuration -->
+    <mcconfigs>
+        <!-- Without Scheduler FIFO -->
+        <mcconfig src="../../DRAMSys/simulator/resources/configs/mcconfigs/fifoStrict.xml"/>
+    </mcconfigs>
+
+    <tracesetups>
+        <tracesetup id="ddr3_single_dev_1Gbx8_p1KB_brc">
+            <!-- The bus master device runs @ 200 MHz -->
+            <device clkMhz="200">ddr3_single_dev_example.stl</device>
+        </tracesetup>
+    </tracesetups>
+
+</simulation>
+
diff --git a/DRAMSys/simulator/src/controller/core/configuration/Configuration.cpp b/DRAMSys/simulator/src/controller/core/configuration/Configuration.cpp
index 62959c6f..c0f3cfb9 100644
--- a/DRAMSys/simulator/src/controller/core/configuration/Configuration.cpp
+++ b/DRAMSys/simulator/src/controller/core/configuration/Configuration.cpp
@@ -257,7 +257,7 @@ unsigned int Configuration::getDataBusWidth()
     return dataBusWidth;
 }
 
-// Returns the number of bytes in a burst
+// Returns the number of bytes transfered in a burst
 unsigned int Configuration::getBytesPerBurst()
 {
     // First multiply to get the number of bits in a burst, then divide by 8 to get the value in bytes. The order is important. Think on a single x4 device.
@@ -266,10 +266,10 @@ unsigned int Configuration::getBytesPerBurst()
 
     if (NumberOfDevicesOnDIMM > 1) {
         // The least significant bits of the physical address are the byte
-        // offset of the N-byte-wide memory module (a single data word has N
-        // bytes. N = 2^(# bits for byte offset)).
-        unsigned int dataWordSizeInBytes = xmlAddressDecoder::getInstance().amount["bytes"];
-        assert(bytesPerBurst == (dataWordSizeInBytes * memSpec.BurstLength));
+        // offset of the N-byte-wide memory module (DIMM) (a single data word
+        // or burst element has N bytes. N = 2^(# bits for byte offset)).
+        unsigned int burstElementSizeInBytes = xmlAddressDecoder::getInstance().amount["bytes"];
+        assert(bytesPerBurst == (burstElementSizeInBytes * memSpec.BurstLength));
     }
 
     return bytesPerBurst;